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WLE5CC_NODE_STS
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refine R4 logic

This commit is contained in:
Yunhorn 2024-10-22 19:06:15 +08:00
parent 78e652fd20
commit 7b1863a2de
2 changed files with 12 additions and 17 deletions
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8
Core/Inc/sys_conf.h
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@ -47,12 +47,12 @@ extern "C" {
/**
* @brief Verbose level for all trace logs
*/
#define VERBOSE_LEVEL VLEVEL_M
#define VERBOSE_LEVEL VLEVEL_OFF
/**
* @brief Enable trace logs
*/
#define APP_LOG_ENABLED 1
#define APP_LOG_ENABLED 0
/**
* @brief Activate monitoring (probes) of some internal RF signals for debug purpose
@ -75,13 +75,13 @@ extern "C" {
* @brief Enable/Disable MCU Debugger pins (dbg serial wires)
* @note by HW serial wires are ON by default, need to put them OFF to save power
*/
#define DEBUGGER_ENABLED 1
#define DEBUGGER_ENABLED 0
/**
* @brief Disable Low Power mode
* @note 0: LowPowerMode enabled. MCU enters stop2 mode, 1: LowPowerMode disabled. MCU enters sleep mode only
*/
#define LOW_POWER_DISABLE 1
#define LOW_POWER_DISABLE 0
/* USER CODE BEGIN EC */

21
Core/Src/main.c
View File

@ -98,20 +98,15 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_I2C2_Init();
MX_DMA_Init();
if(__HAL_PWR_GET_FLAG(PWR_FLAG_SB) == RESET)
{
MX_LoRaWAN_Init();
} else
if(__HAL_PWR_GET_FLAG(PWR_FLAG_SB) != RESET)
{
__HAL_PWR_CLEAR_FLAG(PWR_FLAG_SB);
/* Enable access to RTC domain for following wake-up source configuration */
//HAL_PWR_EnableBkUpAccess();
//__HAL_RCC_RTCAPB_CLK_ENABLE();
}
else
{
MX_I2C2_Init();
MX_DMA_Init();
MX_LoRaWAN_Init();
}
/* USER CODE BEGIN 2 */
@ -170,7 +165,7 @@ void SystemClock_Config(void)
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1;
//RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
{