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good with flash to MFG default and normal NVM

This commit is contained in:
Yunhorn 2025-04-08 22:10:42 +08:00
parent 4640c625a5
commit 619122e7fe
3 changed files with 96 additions and 5 deletions
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6
Core/Inc/yunhorn_sts_prd_conf.h
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@ -440,8 +440,12 @@
*/
#define FLASH_USER_START_ADDR ((void *) 0x0803F800UL) // Last 2kB of flash
#define FLASH_USER_CONFIG_SIZE ((void *) 0x000007FFUL) //0x400=1KB=1024
#define FLASH_USER_CONFIG_SIZE ((void *) 0x000003FFUL) //0x400=1KB=1024
#define FLASH_USER_END_ADDR (FLASH_USER_START_ADDR + FLASH_USER_CONFIG - 1)
#define FLASH_MFG_DEFAULT_START_ADDR ((void *) 0x0803FC00UL) // Last 1kB of flash
#define FLASH_MFG_DEFAULT_CONFIG_SIZE ((void *) 0x000003FFUL) //0x400=1KB=1024
#define FLASH_MFG_DEFAULT_END_ADDR (FLASH_MFG_DEFAULT_START_ADDR + FLASH_MFG_DEFAULT_CONFIG_SIZE - 1)
/* 2KB = 2048 = 0x800 End @ of user Flash area */
/**

95
LoRaWAN/App/lora_app.c
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@ -86,6 +86,8 @@ volatile bool p2_work_finished=true;
extern volatile uint8_t luminance_level;
uint8_t outbuf[255]={0x0};
volatile static bool r_b=true;
volatile uint8_t sts_cfg_nvm_factory_default[64]={0xF0};
static void STS_Show_STS_CFG_NVM(uint8_t * nvm_store_value);
volatile sts_cfg_nvm_t sts_cfg_nvm = {
sts_mtmcode1,
sts_mtmcode2,
@ -1926,7 +1928,14 @@ void USER_APP_AUTO_RESPONDER_Parse(char *tlv_buf, uint8_t tlv_buf_size)
__set_FAULTMASK(1);
OnSystemReset();
} else if ((char)tlv_buf[CFG_CMD3] == 'S') { // Self Function Testing "YZS"
} else if ((char)tlv_buf[CFG_CMD3] == 'F') { // RESET TO FACTORY ORIGINAL SETTING "YZF"
sts_cfg_nvm_factory_default[0] = 0x46; // F flag set
STS_REBOOT_CONFIG_Init();
__set_FAULTMASK(1);
OnSystemReset();
} else if ((char)tlv_buf[CFG_CMD3] == 'S') { // Self Function Testing "YZS"
i=0;
//outbuf[i++] = (uint8_t) 'Y';
//outbuf[i++] = (uint8_t) 'Z';
@ -2722,7 +2731,7 @@ void STS_SENSOR_Upload_Message(uint8_t appDataPort, uint8_t appBufferSize, uint8
void OnStoreSTSCFGContextRequest(void)
{
/* USER CODE BEGIN OnStoreContextRequest_1 */
uint8_t i=0,j=0,nvm_store_value[YUNHORN_STS_MAX_NVM_CFG_SIZE]={0x0};
uint8_t i=0,j=0,nvm_store_value[2*YUNHORN_STS_MAX_NVM_CFG_SIZE]={0x0};
//#if (defined(STS_O7)||defined(STS_O5) || defined(STS_O6) || defined(STS_R0) || defined(STS_R5)|| defined(STS_R4)|| defined(STS_R1D))
sts_cfg_nvm.length = STS_O7_NVM_CFG_SIZE;
@ -2767,9 +2776,40 @@ void OnStoreSTSCFGContextRequest(void)
if (FLASH_IF_Erase(STS_CONFIG_NVM_BASE_ADDRESS, FLASH_PAGE_SIZE) == FLASH_IF_OK)
{
FLASH_IF_Write(STS_CONFIG_NVM_BASE_ADDRESS, (const void *)nvm_store_value, YUNHORN_STS_MAX_NVM_CFG_SIZE);
}
APP_LOG(TS_OFF, VLEVEL_M, "\r\n %%%%% write CFG to normal NVM \r\n");
FLASH_IF_Write(STS_CONFIG_NVM_BASE_ADDRESS, (const void *)nvm_store_value, YUNHORN_STS_MAX_NVM_CFG_SIZE);
FLASH_IF_Write(FLASH_MFG_DEFAULT_START_ADDR, (const void *)nvm_store_value, YUNHORN_STS_MAX_NVM_CFG_SIZE);
if (sts_cfg_nvm_factory_default[0] == 0xF0)
{
APP_LOG(TS_OFF, VLEVEL_M, "\r\n %%%%% write CFG to MFG DEFAULT SECTOR NVM \r\n");
UTIL_MEM_cpy_8((void*)sts_cfg_nvm_factory_default, (void*)nvm_store_value, YUNHORN_STS_MAX_NVM_CFG_SIZE);
if ((sts_cfg_nvm.ac[0] != 0x0) && (sts_cfg_nvm.ac[19] != 0x0)) {
sts_cfg_nvm_factory_default[0] = 0xF3; // with good ac code already
} else {
sts_cfg_nvm_factory_default[0] = 0xF2; // no good ac code yet
}
FLASH_IF_Write(FLASH_MFG_DEFAULT_START_ADDR, (const void *)sts_cfg_nvm_factory_default, YUNHORN_STS_MAX_NVM_CFG_SIZE);
APP_LOG(TS_OFF, VLEVEL_M, "\r\n $$$$$$$$$ FINISHED write CFG to MFG DEFAULT SECTOR NVM \r\n");
} else if ((sts_cfg_nvm_factory_default[0] == 0xF2) && (hmac_result.ac_pass==1) ) //only store ac code at first time of ac_pass=1
{
if ((sts_cfg_nvm.ac[0]!=0x0) && (sts_cfg_nvm.ac[19]!=0x0)) {
for (j = 0; j < YUNHORN_STS_AC_CODE_SIZE; j++) {
sts_cfg_nvm_factory_default[YUNHORN_STS_MAX_NVM_CFG_SIZE-YUNHORN_STS_AC_CODE_SIZE+j] = (sts_cfg_nvm.ac[j]);
}
}
APP_LOG(TS_OFF, VLEVEL_M, "\r\n %%%%% write CFG to Factory Default NVM with good AC code\r\n");
sts_cfg_nvm_factory_default[0] = 0xF3; // with valid ac code
FLASH_IF_Write(FLASH_MFG_DEFAULT_START_ADDR, (const void *)sts_cfg_nvm_factory_default, YUNHORN_STS_MAX_NVM_CFG_SIZE);
}
}
/* USER CODE BEGIN OnStoreContextRequest_Last */
@ -2777,6 +2817,18 @@ void OnStoreSTSCFGContextRequest(void)
/* USER CODE END OnStoreContextRequest_Last */
}
void OnRestoreSTSCFG_FactoryDefault_ContextRequest(void *cfg_in_nvm)
{
APP_LOG(TS_OFF, VLEVEL_M, "Restore Defatory Default NVM ********************** \r\n");
/* USER CODE END OnRestoreSTSCFGContextRequest_1 */
FLASH_IF_Read(cfg_in_nvm, FLASH_MFG_DEFAULT_START_ADDR, YUNHORN_STS_MAX_NVM_CFG_SIZE);
STS_Show_STS_CFG_NVM((uint8_t*)cfg_in_nvm);
}
void OnRestoreSTSCFGContextRequest(void *cfg_in_nvm)
{
/* USER CODE BEGIN OnRestoreSTSCFGContextRequest_1 */
@ -2804,6 +2856,20 @@ void STS_REBOOT_CONFIG_Init(void)
/* USER CODE END OnRestoreContextRequest_1 */
//UTIL_MEM_cpy_8(nvm_stored_value, (void *)STS_CONFIG_NVM_BASE_ADDRESS, YUNHORN_STS_MAX_NVM_CFG_SIZE);
FLASH_IF_Read(nvm_stored_value, STS_CONFIG_NVM_BASE_ADDRESS, YUNHORN_STS_MAX_NVM_CFG_SIZE);
#if 0
if (sts_cfg_nvm_factory_default[0] != 0x46) // for normal boot process
{
FLASH_IF_Read(nvm_stored_value, STS_CONFIG_NVM_BASE_ADDRESS, YUNHORN_STS_MAX_NVM_CFG_SIZE);
APP_LOG(TS_OFF, VLEVEL_M, "\r\n %%%%% read config from normal nvm \r\n");
} else if (sts_cfg_nvm_factory_default[0] == 0x46)
{ // RESET TO FACTORY DEFAULT,CONFIG TO ORIGINAL SETTINGS, which 'F' flag set
FLASH_IF_Read(nvm_stored_value, FLASH_MFG_DEFAULT_START_ADDR, YUNHORN_STS_MAX_NVM_CFG_SIZE);
APP_LOG(TS_OFF, VLEVEL_M, "\r\n %%%%% read config from Factory Default nvm \r\n");
}
#endif
STS_Show_STS_CFG_NVM((uint8_t*)nvm_stored_value);
/* USER CODE BEGIN OnRestoreContextRequest_Last */
//#if (defined(STS_O7)||defined(STS_O5) || defined(STS_O6) || defined(STS_R0) || defined(STS_R5)|| defined(STS_R4)|| defined(STS_R1D))
@ -2850,6 +2916,11 @@ void STS_REBOOT_CONFIG_Init(void)
for (uint8_t j=0; j< YUNHORN_STS_AC_CODE_SIZE; j++) {
sts_cfg_nvm.ac[j] = (uint8_t)nvm_stored_value[NVM_AC_CODE_START +j];
}
if ((sts_cfg_nvm.ac[0] != 0x0) && (sts_cfg_nvm.ac[19] != 0x0)) {
sts_cfg_nvm_factory_default[0] = 0xF3; // with good ac code already
} else {
sts_cfg_nvm_factory_default[0] = 0xF2; // no good ac code yet
}
}
//#endif
@ -3037,3 +3108,19 @@ uint32_t STS_Get_Date_Time_Stamp(void)
return (uint32_t)UnixEpoch.Seconds;
}
static void STS_Show_STS_CFG_NVM(uint8_t * store_value)
{
APP_LOG(TS_OFF, VLEVEL_M, "\n-----------------------------------------------\n");
APP_LOG(TS_OFF, VLEVEL_M, "\n00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15\n");
for (uint8_t i=0; i<YUNHORN_STS_MAX_NVM_CFG_SIZE; i++)
{
if (i%16==0) APP_LOG(TS_OFF, VLEVEL_M, "\n");
APP_LOG(TS_OFF, VLEVEL_M, "%02X ", store_value[i]);
}
APP_LOG(TS_OFF, VLEVEL_M, "\n\r");
APP_LOG(TS_OFF, VLEVEL_M, "\n###############################################\n\r");
}

BIN
STM32CubeIDE/Release/STS_O7.bin
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