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 <span id="projectnumber">Version 2.7.1</span>
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<a href="#define-members">Macros</a> </div>
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<div class="title">NAND Mode Controls<div class="ingroups"><a class="el" href="group__nand__control__gr.html">NAND Control Codes</a></div></div> </div>
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<p>Specify operation modes of the NAND interface.
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga9b063c3078e86b50d4aa892518b2e2d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#ga9b063c3078e86b50d4aa892518b2e2d8">ARM_NAND_BUS_MODE</a>   (0x01)</td></tr>
<tr class="memdesc:ga9b063c3078e86b50d4aa892518b2e2d8"><td class="mdescLeft"> </td><td class="mdescRight">Set Bus Mode as specified with arg. <a href="#ga9b063c3078e86b50d4aa892518b2e2d8">More...</a><br/></td></tr>
<tr class="separator:ga9b063c3078e86b50d4aa892518b2e2d8"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga2d3356f5b47871c465ae7136a2c533f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#ga2d3356f5b47871c465ae7136a2c533f4">ARM_NAND_BUS_DATA_WIDTH</a>   (0x02)</td></tr>
<tr class="memdesc:ga2d3356f5b47871c465ae7136a2c533f4"><td class="mdescLeft"> </td><td class="mdescRight">Set Bus Data Width as specified with arg. <a href="#ga2d3356f5b47871c465ae7136a2c533f4">More...</a><br/></td></tr>
<tr class="separator:ga2d3356f5b47871c465ae7136a2c533f4"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga5d1d46198404fe115b013bdae7af2a2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#ga5d1d46198404fe115b013bdae7af2a2f">ARM_NAND_DRIVER_STRENGTH</a>   (0x03)</td></tr>
<tr class="memdesc:ga5d1d46198404fe115b013bdae7af2a2f"><td class="mdescLeft"> </td><td class="mdescRight">Set Driver Strength as specified with arg. <a href="#ga5d1d46198404fe115b013bdae7af2a2f">More...</a><br/></td></tr>
<tr class="separator:ga5d1d46198404fe115b013bdae7af2a2f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga1bffc9f341e704ee0e845d86a2989921"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#ga1bffc9f341e704ee0e845d86a2989921">ARM_NAND_DEVICE_READY_EVENT</a>   (0x04)</td></tr>
<tr class="memdesc:ga1bffc9f341e704ee0e845d86a2989921"><td class="mdescLeft"> </td><td class="mdescRight">Generate <a class="el" href="group__NAND__events.html#gae0be7e1b41188def905de0a1568d442d">ARM_NAND_EVENT_DEVICE_READY</a>; arg: 0=disabled (default), 1=enabled. <a href="#ga1bffc9f341e704ee0e845d86a2989921">More...</a><br/></td></tr>
<tr class="separator:ga1bffc9f341e704ee0e845d86a2989921"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaab6dea1b565aeb53e360876a4e50783c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#gaab6dea1b565aeb53e360876a4e50783c">ARM_NAND_DRIVER_READY_EVENT</a>   (0x05)</td></tr>
<tr class="memdesc:gaab6dea1b565aeb53e360876a4e50783c"><td class="mdescLeft"> </td><td class="mdescRight">Generate <a class="el" href="group__NAND__events.html#ga7b390a906db42c5ea4db38e0e85bb9e9">ARM_NAND_EVENT_DRIVER_READY</a>; arg: 0=disabled (default), 1=enabled. <a href="#gaab6dea1b565aeb53e360876a4e50783c">More...</a><br/></td></tr>
<tr class="separator:gaab6dea1b565aeb53e360876a4e50783c"><td class="memSeparator" colspan="2"> </td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<p>Specify operation modes of the NAND interface. </p>
<p>These controls can be used in the function <a class="el" href="group__nand__interface__gr.html#ga83061d6d53ffb148853efbc87a864607">ARM_NAND_Control</a> for the parameter <em>control</em>. </p>
<h2 class="groupheader">Macro Definition Documentation</h2>
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<td class="memname">#define ARM_NAND_BUS_MODE   (0x01)</td>
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<p>Set Bus Mode as specified with arg. </p>
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<td class="memname">#define ARM_NAND_BUS_DATA_WIDTH   (0x02)</td>
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<p>Set Bus Data Width as specified with arg. </p>
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<a class="anchor" id="ga5d1d46198404fe115b013bdae7af2a2f"></a>
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<td class="memname">#define ARM_NAND_DRIVER_STRENGTH   (0x03)</td>
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<p>Set Driver Strength as specified with arg. </p>
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<td class="memname">#define ARM_NAND_DEVICE_READY_EVENT   (0x04)</td>
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<p>Generate <a class="el" href="group__NAND__events.html#gae0be7e1b41188def905de0a1568d442d">ARM_NAND_EVENT_DEVICE_READY</a>; arg: 0=disabled (default), 1=enabled. </p>
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<td class="memname">#define ARM_NAND_DRIVER_READY_EVENT   (0x05)</td>
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<p>Generate <a class="el" href="group__NAND__events.html#ga7b390a906db42c5ea4db38e0e85bb9e9">ARM_NAND_EVENT_DRIVER_READY</a>; arg: 0=disabled (default), 1=enabled. </p>
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