493 lines
14 KiB
C
493 lines
14 KiB
C
/**
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******************************************************************************
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* @file iis2mdc_reg.h
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* @author Sensors Software Solution Team
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* @brief This file contains all the functions prototypes for the
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* iis2mdc_reg.c driver.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef IIS2MDC_REGS_H
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#define IIS2MDC_REGS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include <stdint.h>
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#include <stddef.h>
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#include <math.h>
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/** @addtogroup IIS2MDC
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* @{
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*
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*/
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/** @defgroup Endianness definitions
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* @{
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*
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*/
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#ifndef DRV_BYTE_ORDER
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#ifndef __BYTE_ORDER__
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#define DRV_LITTLE_ENDIAN 1234
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#define DRV_BIG_ENDIAN 4321
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/** if _BYTE_ORDER is not defined, choose the endianness of your architecture
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* by uncommenting the define which fits your platform endianness
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*/
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//#define DRV_BYTE_ORDER DRV_BIG_ENDIAN
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#define DRV_BYTE_ORDER DRV_LITTLE_ENDIAN
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#else /* defined __BYTE_ORDER__ */
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#define DRV_LITTLE_ENDIAN __ORDER_LITTLE_ENDIAN__
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#define DRV_BIG_ENDIAN __ORDER_BIG_ENDIAN__
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#define DRV_BYTE_ORDER __BYTE_ORDER__
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#endif /* __BYTE_ORDER__*/
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#endif /* DRV_BYTE_ORDER */
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/**
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* @}
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*
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*/
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/** @defgroup STMicroelectronics sensors common types
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* @{
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*
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*/
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#ifndef MEMS_SHARED_TYPES
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#define MEMS_SHARED_TYPES
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typedef struct
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{
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#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
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uint8_t bit0 : 1;
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uint8_t bit1 : 1;
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uint8_t bit2 : 1;
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uint8_t bit3 : 1;
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uint8_t bit4 : 1;
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uint8_t bit5 : 1;
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uint8_t bit6 : 1;
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uint8_t bit7 : 1;
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#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
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uint8_t bit7 : 1;
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uint8_t bit6 : 1;
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uint8_t bit5 : 1;
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uint8_t bit4 : 1;
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uint8_t bit3 : 1;
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uint8_t bit2 : 1;
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uint8_t bit1 : 1;
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uint8_t bit0 : 1;
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#endif /* DRV_BYTE_ORDER */
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} bitwise_t;
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#define PROPERTY_DISABLE (0U)
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#define PROPERTY_ENABLE (1U)
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/** @addtogroup Interfaces_Functions
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* @brief This section provide a set of functions used to read and
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* write a generic register of the device.
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* MANDATORY: return 0 -> no Error.
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* @{
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*
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*/
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typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, uint8_t *, uint16_t);
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typedef int32_t (*stmdev_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
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typedef struct
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{
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/** Component mandatory fields **/
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stmdev_write_ptr write_reg;
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stmdev_read_ptr read_reg;
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/** Customizable optional pointer **/
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void *handle;
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} stmdev_ctx_t;
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/**
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* @}
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*
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*/
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#endif /* MEMS_SHARED_TYPES */
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#ifndef MEMS_UCF_SHARED_TYPES
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#define MEMS_UCF_SHARED_TYPES
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/** @defgroup Generic address-data structure definition
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* @brief This structure is useful to load a predefined configuration
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* of a sensor.
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* You can create a sensor configuration by your own or using
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* Unico / Unicleo tools available on STMicroelectronics
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* web site.
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*
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* @{
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*
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*/
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typedef struct
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{
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uint8_t address;
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uint8_t data;
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} ucf_line_t;
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/**
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* @}
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*
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*/
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#endif /* MEMS_UCF_SHARED_TYPES */
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/**
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* @}
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*
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*/
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/** @defgroup iis2mdc_Infos
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* @{
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*
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*/
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/** I2C Device Address 8 bit format **/
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#define IIS2MDC_I2C_ADD 0x3DU
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/** Device Identification (Who am I) **/
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#define IIS2MDC_ID 0x40U
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/**
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* @}
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*
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*/
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#define IIS2MDC_OFFSET_X_REG_L 0x45U
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#define IIS2MDC_OFFSET_X_REG_H 0x46U
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#define IIS2MDC_OFFSET_Y_REG_L 0x47U
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#define IIS2MDC_OFFSET_Y_REG_H 0x48U
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#define IIS2MDC_OFFSET_Z_REG_L 0x49U
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#define IIS2MDC_OFFSET_Z_REG_H 0x4AU
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#define IIS2MDC_WHO_AM_I 0x4FU
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#define IIS2MDC_CFG_REG_A 0x60U
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typedef struct
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{
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#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
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uint8_t md : 2;
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uint8_t odr : 2;
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uint8_t lp : 1;
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uint8_t soft_rst : 1;
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uint8_t reboot : 1;
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uint8_t comp_temp_en : 1;
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#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
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uint8_t comp_temp_en : 1;
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uint8_t reboot : 1;
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uint8_t soft_rst : 1;
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uint8_t lp : 1;
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uint8_t odr : 2;
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uint8_t md : 2;
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#endif /* DRV_BYTE_ORDER */
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} iis2mdc_cfg_reg_a_t;
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#define IIS2MDC_CFG_REG_B 0x61U
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typedef struct
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{
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#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
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uint8_t lpf : 1;
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uint8_t set_rst : 2; /* OFF_CANC + Set_FREQ */
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uint8_t int_on_dataoff : 1;
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uint8_t off_canc_one_shot : 1;
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uint8_t not_used_01 : 3;
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#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
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uint8_t not_used_01 : 3;
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uint8_t off_canc_one_shot : 1;
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uint8_t int_on_dataoff : 1;
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uint8_t set_rst : 2; /* OFF_CANC + Set_FREQ */
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uint8_t lpf : 1;
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#endif /* DRV_BYTE_ORDER */
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} iis2mdc_cfg_reg_b_t;
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#define IIS2MDC_CFG_REG_C 0x62U
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typedef struct
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{
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#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
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uint8_t drdy_on_pin : 1;
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uint8_t self_test : 1;
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uint8_t not_used_01 : 1;
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uint8_t ble : 1;
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uint8_t bdu : 1;
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uint8_t i2c_dis : 1;
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uint8_t int_on_pin : 1;
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uint8_t not_used_02 : 1;
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#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
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uint8_t not_used_02 : 1;
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uint8_t int_on_pin : 1;
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uint8_t i2c_dis : 1;
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uint8_t bdu : 1;
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uint8_t ble : 1;
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uint8_t not_used_01 : 1;
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uint8_t self_test : 1;
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uint8_t drdy_on_pin : 1;
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#endif /* DRV_BYTE_ORDER */
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} iis2mdc_cfg_reg_c_t;
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#define IIS2MDC_INT_CRTL_REG 0x63U
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typedef struct
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{
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#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
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uint8_t ien : 1;
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uint8_t iel : 1;
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uint8_t iea : 1;
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uint8_t not_used_01 : 2;
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uint8_t zien : 1;
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uint8_t yien : 1;
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uint8_t xien : 1;
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#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
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uint8_t xien : 1;
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uint8_t yien : 1;
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uint8_t zien : 1;
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uint8_t not_used_01 : 2;
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uint8_t iea : 1;
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uint8_t iel : 1;
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uint8_t ien : 1;
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#endif /* DRV_BYTE_ORDER */
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} iis2mdc_int_crtl_reg_t;
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#define IIS2MDC_INT_SOURCE_REG 0x64U
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typedef struct
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{
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#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
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uint8_t _int : 1;
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uint8_t mroi : 1;
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uint8_t n_th_s_z : 1;
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uint8_t n_th_s_y : 1;
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uint8_t n_th_s_x : 1;
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uint8_t p_th_s_z : 1;
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uint8_t p_th_s_y : 1;
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uint8_t p_th_s_x : 1;
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#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
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uint8_t p_th_s_x : 1;
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uint8_t p_th_s_y : 1;
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uint8_t p_th_s_z : 1;
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uint8_t n_th_s_x : 1;
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uint8_t n_th_s_y : 1;
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uint8_t n_th_s_z : 1;
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uint8_t mroi : 1;
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uint8_t _int : 1;
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#endif /* DRV_BYTE_ORDER */
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} iis2mdc_int_source_reg_t;
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#define IIS2MDC_INT_THS_L_REG 0x65U
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#define IIS2MDC_INT_THS_H_REG 0x66U
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#define IIS2MDC_STATUS_REG 0x67U
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typedef struct
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{
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#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
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uint8_t xda : 1;
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uint8_t yda : 1;
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uint8_t zda : 1;
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uint8_t zyxda : 1;
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uint8_t _xor : 1;
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uint8_t yor : 1;
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uint8_t zor : 1;
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uint8_t zyxor : 1;
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#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
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uint8_t zyxor : 1;
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uint8_t zor : 1;
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uint8_t yor : 1;
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uint8_t _xor : 1;
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uint8_t zyxda : 1;
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uint8_t zda : 1;
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uint8_t yda : 1;
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uint8_t xda : 1;
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#endif /* DRV_BYTE_ORDER */
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} iis2mdc_status_reg_t;
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#define IIS2MDC_OUTX_L_REG 0x68U
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#define IIS2MDC_OUTX_H_REG 0x69U
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#define IIS2MDC_OUTY_L_REG 0x6AU
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#define IIS2MDC_OUTY_H_REG 0x6BU
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#define IIS2MDC_OUTZ_L_REG 0x6CU
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#define IIS2MDC_OUTZ_H_REG 0x6DU
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#define IIS2MDC_TEMP_OUT_L_REG 0x6EU
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#define IIS2MDC_TEMP_OUT_H_REG 0x6FU
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typedef union
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{
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iis2mdc_cfg_reg_a_t cfg_reg_a;
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iis2mdc_cfg_reg_b_t cfg_reg_b;
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iis2mdc_cfg_reg_c_t cfg_reg_c;
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iis2mdc_int_crtl_reg_t int_crtl_reg;
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iis2mdc_int_source_reg_t int_source_reg;
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iis2mdc_status_reg_t status_reg;
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bitwise_t bitwise;
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uint8_t byte;
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} iis2mdc_reg_t;
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int32_t iis2mdc_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
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uint8_t *data,
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uint16_t len);
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int32_t iis2mdc_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
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uint8_t *data,
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uint16_t len);
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float_t iis2mdc_from_lsb_to_mgauss(int16_t lsb);
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float_t iis2mdc_from_lsb_to_celsius(int16_t lsb);
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int32_t iis2mdc_mag_user_offset_set(stmdev_ctx_t *ctx, int16_t *val);
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int32_t iis2mdc_mag_user_offset_get(stmdev_ctx_t *ctx, int16_t *val);
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typedef enum
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{
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IIS2MDC_CONTINUOUS_MODE = 0,
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IIS2MDC_SINGLE_TRIGGER = 1,
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IIS2MDC_POWER_DOWN = 2,
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} iis2mdc_md_t;
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int32_t iis2mdc_operating_mode_set(stmdev_ctx_t *ctx,
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iis2mdc_md_t val);
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int32_t iis2mdc_operating_mode_get(stmdev_ctx_t *ctx,
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iis2mdc_md_t *val);
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typedef enum
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{
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IIS2MDC_ODR_10Hz = 0,
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IIS2MDC_ODR_20Hz = 1,
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IIS2MDC_ODR_50Hz = 2,
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IIS2MDC_ODR_100Hz = 3,
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} iis2mdc_odr_t;
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int32_t iis2mdc_data_rate_set(stmdev_ctx_t *ctx, iis2mdc_odr_t val);
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int32_t iis2mdc_data_rate_get(stmdev_ctx_t *ctx, iis2mdc_odr_t *val);
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typedef enum
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{
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IIS2MDC_HIGH_RESOLUTION = 0,
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IIS2MDC_LOW_POWER = 1,
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} iis2mdc_lp_t;
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int32_t iis2mdc_power_mode_set(stmdev_ctx_t *ctx, iis2mdc_lp_t val);
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int32_t iis2mdc_power_mode_get(stmdev_ctx_t *ctx, iis2mdc_lp_t *val);
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int32_t iis2mdc_offset_temp_comp_set(stmdev_ctx_t *ctx, uint8_t val);
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int32_t iis2mdc_offset_temp_comp_get(stmdev_ctx_t *ctx, uint8_t *val);
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typedef enum
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{
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IIS2MDC_ODR_DIV_2 = 0,
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IIS2MDC_ODR_DIV_4 = 1,
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} iis2mdc_lpf_t;
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int32_t iis2mdc_low_pass_bandwidth_set(stmdev_ctx_t *ctx,
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iis2mdc_lpf_t val);
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int32_t iis2mdc_low_pass_bandwidth_get(stmdev_ctx_t *ctx,
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iis2mdc_lpf_t *val);
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typedef enum
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{
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IIS2MDC_SET_SENS_ODR_DIV_63 = 0,
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IIS2MDC_SENS_OFF_CANC_EVERY_ODR = 1,
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IIS2MDC_SET_SENS_ONLY_AT_POWER_ON = 2,
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} iis2mdc_set_rst_t;
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int32_t iis2mdc_set_rst_mode_set(stmdev_ctx_t *ctx,
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iis2mdc_set_rst_t val);
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int32_t iis2mdc_set_rst_mode_get(stmdev_ctx_t *ctx,
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iis2mdc_set_rst_t *val);
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int32_t iis2mdc_set_rst_sensor_single_set(stmdev_ctx_t *ctx,
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uint8_t val);
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int32_t iis2mdc_set_rst_sensor_single_get(stmdev_ctx_t *ctx,
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uint8_t *val);
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int32_t iis2mdc_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val);
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int32_t iis2mdc_block_data_update_get(stmdev_ctx_t *ctx,
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uint8_t *val);
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int32_t iis2mdc_mag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val);
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int32_t iis2mdc_mag_data_ovr_get(stmdev_ctx_t *ctx, uint8_t *val);
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int32_t iis2mdc_magnetic_raw_get(stmdev_ctx_t *ctx, int16_t *val);
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int32_t iis2mdc_temperature_raw_get(stmdev_ctx_t *ctx, int16_t *val);
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int32_t iis2mdc_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff);
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int32_t iis2mdc_reset_set(stmdev_ctx_t *ctx, uint8_t val);
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int32_t iis2mdc_reset_get(stmdev_ctx_t *ctx, uint8_t *val);
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int32_t iis2mdc_boot_set(stmdev_ctx_t *ctx, uint8_t val);
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int32_t iis2mdc_boot_get(stmdev_ctx_t *ctx, uint8_t *val);
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int32_t iis2mdc_self_test_set(stmdev_ctx_t *ctx, uint8_t val);
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int32_t iis2mdc_self_test_get(stmdev_ctx_t *ctx, uint8_t *val);
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typedef enum
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{
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IIS2MDC_LSB_AT_LOW_ADD = 0,
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IIS2MDC_MSB_AT_LOW_ADD = 1,
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} iis2mdc_ble_t;
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int32_t iis2mdc_data_format_set(stmdev_ctx_t *ctx, iis2mdc_ble_t val);
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int32_t iis2mdc_data_format_get(stmdev_ctx_t *ctx,
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iis2mdc_ble_t *val);
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int32_t iis2mdc_status_get(stmdev_ctx_t *ctx,
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iis2mdc_status_reg_t *val);
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typedef enum
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{
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IIS2MDC_CHECK_BEFORE = 0,
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IIS2MDC_CHECK_AFTER = 1,
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} iis2mdc_int_on_dataoff_t;
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int32_t iis2mdc_offset_int_conf_set(stmdev_ctx_t *ctx,
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iis2mdc_int_on_dataoff_t val);
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int32_t iis2mdc_offset_int_conf_get(stmdev_ctx_t *ctx,
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iis2mdc_int_on_dataoff_t *val);
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int32_t iis2mdc_drdy_on_pin_set(stmdev_ctx_t *ctx, uint8_t val);
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int32_t iis2mdc_drdy_on_pin_get(stmdev_ctx_t *ctx, uint8_t *val);
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int32_t iis2mdc_int_on_pin_set(stmdev_ctx_t *ctx, uint8_t val);
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int32_t iis2mdc_int_on_pin_get(stmdev_ctx_t *ctx, uint8_t *val);
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int32_t iis2mdc_int_gen_conf_set(stmdev_ctx_t *ctx,
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iis2mdc_int_crtl_reg_t *val);
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int32_t iis2mdc_int_gen_conf_get(stmdev_ctx_t *ctx,
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iis2mdc_int_crtl_reg_t *val);
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int32_t iis2mdc_int_gen_source_get(stmdev_ctx_t *ctx,
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iis2mdc_int_source_reg_t *val);
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int32_t iis2mdc_int_gen_treshold_set(stmdev_ctx_t *ctx, int16_t val);
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int32_t iis2mdc_int_gen_treshold_get(stmdev_ctx_t *ctx, int16_t *val);
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typedef enum
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{
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IIS2MDC_I2C_ENABLE = 0,
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IIS2MDC_I2C_DISABLE = 1,
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} iis2mdc_i2c_dis_t;
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int32_t iis2mdc_i2c_interface_set(stmdev_ctx_t *ctx,
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iis2mdc_i2c_dis_t val);
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int32_t iis2mdc_i2c_interface_get(stmdev_ctx_t *ctx,
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iis2mdc_i2c_dis_t *val);
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/**
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* @}
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*
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* IIS2MDC_REGS_H */
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