Silk To Solder Mask (Clearance=10mil) (IsPad),(All) |
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1038.307mil,113.937mil) on Top Overlay And Pad C18-1(1052.677mil,129.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1038.307mil,113.937mil) on Top Overlay And Pad C19-1(1052.677mil,129.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1038.307mil,144.646mil) on Top Overlay And Pad C18-1(1052.677mil,129.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1038.307mil,144.646mil) on Top Overlay And Pad C19-1(1052.677mil,129.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1038.307mil,199.937mil) on Top Overlay And Pad C17-1(1052.677mil,215.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1038.307mil,199.937mil) on Top Overlay And Pad C18-1(1052.677mil,215.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1038.307mil,230.646mil) on Top Overlay And Pad C17-1(1052.677mil,215.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1038.307mil,230.646mil) on Top Overlay And Pad C18-1(1052.677mil,215.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1127.677mil,113.937mil) on Top Overlay And Pad C18-2(1113.307mil,129.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1127.677mil,113.937mil) on Top Overlay And Pad C19-2(1113.307mil,129.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1127.677mil,144.646mil) on Top Overlay And Pad C18-2(1113.307mil,129.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1127.677mil,144.646mil) on Top Overlay And Pad C19-2(1113.307mil,129.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1127.677mil,199.937mil) on Top Overlay And Pad C17-2(1113.307mil,215.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1127.677mil,199.937mil) on Top Overlay And Pad C18-2(1113.307mil,215.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1127.677mil,230.646mil) on Top Overlay And Pad C17-2(1113.307mil,215.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1127.677mil,230.646mil) on Top Overlay And Pad C18-2(1113.307mil,215.291mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1173.315mil,2904.646mil) on Top Overlay And Pad C3-1(1187.685mil,2920mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1173.315mil,2904.646mil) on Top Overlay And Pad C3-1(1187.685mil,2920mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1173.315mil,2935.354mil) on Top Overlay And Pad C3-1(1187.685mil,2920mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1173.315mil,2935.354mil) on Top Overlay And Pad C3-1(1187.685mil,2920mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1200.963mil,3506.646mil) on Top Overlay And Pad C21-2(1215.333mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1200.963mil,3506.646mil) on Top Overlay And Pad C6-2(1215.333mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1200.963mil,3537.354mil) on Top Overlay And Pad C21-2(1215.333mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1200.963mil,3537.354mil) on Top Overlay And Pad C6-2(1215.333mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1262.685mil,2904.646mil) on Top Overlay And Pad C3-2(1248.315mil,2920mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1255.318mil,326.646mil) on Top Overlay And Pad C17-2(1269.688mil,342mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1262.685mil,2935.354mil) on Top Overlay And Pad C3-2(1248.315mil,2920mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1255.318mil,357.354mil) on Top Overlay And Pad C17-2(1269.688mil,342mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1290.333mil,3506.646mil) on Top Overlay And Pad C21-1(1275.963mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1262.685mil,2904.646mil) on Top Overlay And Pad C3-2(1248.315mil,2920mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1290.333mil,3537.354mil) on Top Overlay And Pad C21-1(1275.963mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1262.685mil,2935.354mil) on Top Overlay And Pad C3-2(1248.315mil,2920mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1419.646mil,3156.315mil) on Top Overlay And Pad C5-2(1435mil,3170.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1290.333mil,3506.646mil) on Top Overlay And Pad C6-1(1275.963mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1419.646mil,3245.685mil) on Top Overlay And Pad C5-1(1435mil,3231.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1290.333mil,3537.354mil) on Top Overlay And Pad C6-1(1275.963mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1450.354mil,3156.315mil) on Top Overlay And Pad C5-2(1435mil,3170.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1344.688mil,326.646mil) on Top Overlay And Pad C17-1(1330.318mil,342mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1450.354mil,3245.685mil) on Top Overlay And Pad C5-1(1435mil,3231.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1344.688mil,357.354mil) on Top Overlay And Pad C17-1(1330.318mil,342mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1605.315mil,3405.646mil) on Top Overlay And Pad C2-1(1619.685mil,3421mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1419.646mil,3156.315mil) on Top Overlay And Pad C5-2(1435mil,3170.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1605.315mil,3436.354mil) on Top Overlay And Pad C2-1(1619.685mil,3421mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1419.646mil,3245.685mil) on Top Overlay And Pad C5-1(1435mil,3231.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1694.685mil,3405.646mil) on Top Overlay And Pad C2-2(1680.315mil,3421mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1450.354mil,3156.315mil) on Top Overlay And Pad C5-2(1435mil,3170.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1694.685mil,3436.354mil) on Top Overlay And Pad C2-2(1680.315mil,3421mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1450.354mil,3245.685mil) on Top Overlay And Pad C5-1(1435mil,3231.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1869.646mil,1042.685mil) on Top Overlay And Pad C19-1(1885mil,1028.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1605.315mil,3405.646mil) on Top Overlay And Pad C2-1(1619.685mil,3421mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1869.646mil,953.315mil) on Top Overlay And Pad C19-2(1885mil,967.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1605.315mil,3436.354mil) on Top Overlay And Pad C2-1(1619.685mil,3421mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1900.354mil,1042.685mil) on Top Overlay And Pad C19-1(1885mil,1028.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1694.685mil,3405.646mil) on Top Overlay And Pad C2-2(1680.315mil,3421mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1900.354mil,953.315mil) on Top Overlay And Pad C19-2(1885mil,967.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1694.685mil,3436.354mil) on Top Overlay And Pad C2-2(1680.315mil,3421mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1934.853mil,1395.396mil) on Top Overlay And Pad C20-2(1949.223mil,1410.75mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1869.646mil,1042.685mil) on Top Overlay And Pad C20-1(1885mil,1028.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1934.853mil,1426.105mil) on Top Overlay And Pad C20-2(1949.223mil,1410.75mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1869.646mil,953.315mil) on Top Overlay And Pad C20-2(1885mil,967.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1971.315mil,2247.646mil) on Top Overlay And Pad C9-1(1985.685mil,2263mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1900.354mil,1042.685mil) on Top Overlay And Pad C20-1(1885mil,1028.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1971.315mil,2278.354mil) on Top Overlay And Pad C9-1(1985.685mil,2263mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1900.354mil,953.315mil) on Top Overlay And Pad C20-2(1885mil,967.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1988.315mil,2491.646mil) on Top Overlay And Pad C7-1(2002.685mil,2507mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1970.315mil,2257.646mil) on Top Overlay And Pad C10-1(1984.685mil,2273mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1988.315mil,2522.354mil) on Top Overlay And Pad C7-1(2002.685mil,2507mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1970.315mil,2288.354mil) on Top Overlay And Pad C10-1(1984.685mil,2273mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1988.315mil,2568.312mil) on Top Overlay And Pad C6-1(2002.685mil,2583.667mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1988.315mil,2491.646mil) on Top Overlay And Pad C8-1(2002.685mil,2507mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1988.315mil,2599.021mil) on Top Overlay And Pad C6-1(2002.685mil,2583.667mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1988.315mil,2522.354mil) on Top Overlay And Pad C8-1(2002.685mil,2507mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2001.646mil,1724.315mil) on Top Overlay And Pad C16-1(2017mil,1738.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1988.315mil,2568.312mil) on Top Overlay And Pad C7-1(2002.685mil,2583.667mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2001.646mil,1813.685mil) on Top Overlay And Pad C16-2(2017mil,1799.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (1988.315mil,2599.021mil) on Top Overlay And Pad C7-1(2002.685mil,2583.667mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2006.646mil,1902mil) on Top Overlay And Pad C10-2(2022mil,1916.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2059.685mil,2257.646mil) on Top Overlay And Pad C10-2(2045.315mil,2273mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2006.646mil,1991.37mil) on Top Overlay And Pad C10-1(2022mil,1977mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2059.685mil,2288.354mil) on Top Overlay And Pad C10-2(2045.315mil,2273mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2024.223mil,1395.396mil) on Top Overlay And Pad C20-1(2009.853mil,1410.75mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2060.646mil,1835.315mil) on Top Overlay And Pad C11-1(2076mil,1849.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2024.223mil,1426.105mil) on Top Overlay And Pad C20-1(2009.853mil,1410.75mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2060.646mil,1924.685mil) on Top Overlay And Pad C11-2(2076mil,1910.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2032.354mil,1724.315mil) on Top Overlay And Pad C16-1(2017mil,1738.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2077.685mil,2491.646mil) on Top Overlay And Pad C8-2(2063.315mil,2507mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2032.354mil,1813.685mil) on Top Overlay And Pad C16-2(2017mil,1799.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2077.685mil,2522.354mil) on Top Overlay And Pad C8-2(2063.315mil,2507mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2037.354mil,1902mil) on Top Overlay And Pad C10-2(2022mil,1916.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2077.685mil,2568.312mil) on Top Overlay And Pad C7-2(2063.315mil,2583.667mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2037.354mil,1991.37mil) on Top Overlay And Pad C10-1(2022mil,1977mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2077.685mil,2599.021mil) on Top Overlay And Pad C7-2(2063.315mil,2583.667mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2060.685mil,2247.646mil) on Top Overlay And Pad C9-2(2046.315mil,2263mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2091.354mil,1835.315mil) on Top Overlay And Pad C11-1(2076mil,1849.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2060.685mil,2278.354mil) on Top Overlay And Pad C9-2(2046.315mil,2263mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2091.354mil,1924.685mil) on Top Overlay And Pad C11-2(2076mil,1910.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2077.685mil,2491.646mil) on Top Overlay And Pad C7-2(2063.315mil,2507mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2369.646mil,2567mil) on Top Overlay And Pad C16-2(2385mil,2581.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2077.685mil,2522.354mil) on Top Overlay And Pad C7-2(2063.315mil,2507mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2369.646mil,2656.37mil) on Top Overlay And Pad C16-1(2385mil,2642mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2077.685mil,2568.312mil) on Top Overlay And Pad C6-2(2063.315mil,2583.667mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2400.354mil,2567mil) on Top Overlay And Pad C16-2(2385mil,2581.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2077.685mil,2599.021mil) on Top Overlay And Pad C6-2(2063.315mil,2583.667mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2400.354mil,2656.37mil) on Top Overlay And Pad C16-1(2385mil,2642mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2386.646mil,2574.307mil) on Top Overlay And Pad C15-2(2402mil,2588.677mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (8.917mil < 10mil) Between Arc (2407.386mil,2680.803mil) on Top Overlay And Pad C16-1(2385mil,2642mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.917mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2386.646mil,2663.677mil) on Top Overlay And Pad C15-1(2402mil,2649.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2560.315mil,1392.646mil) on Top Overlay And Pad C21-1(2574.685mil,1408mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2417.354mil,2574.307mil) on Top Overlay And Pad C15-2(2402mil,2588.677mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2560.315mil,1423.354mil) on Top Overlay And Pad C21-1(2574.685mil,1408mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (5.458mil < 10mil) Between Arc (2417.354mil,2574.307mil) on Top Overlay And Pad Y1-2(2466.008mil,2544.386mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.458mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2583.646mil,1742.315mil) on Top Overlay And Pad C12-1(2599mil,1756.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2417.354mil,2663.677mil) on Top Overlay And Pad C15-1(2402mil,2649.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2583.646mil,1831.685mil) on Top Overlay And Pad C12-2(2599mil,1817.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.664mil < 10mil) Between Arc (2417.354mil,2663.677mil) on Top Overlay And Pad Y1-1(2466.008mil,2631mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.664mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2586.646mil,2562.307mil) on Top Overlay And Pad C14-2(2602mil,2576.677mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2525.315mil,1761.646mil) on Top Overlay And Pad C11-1(2539.685mil,1777mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2586.646mil,2651.677mil) on Top Overlay And Pad C14-1(2602mil,2637.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2525.315mil,1792.354mil) on Top Overlay And Pad C11-1(2539.685mil,1777mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2614.354mil,1742.315mil) on Top Overlay And Pad C12-1(2599mil,1756.685mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2586.646mil,2562.307mil) on Top Overlay And Pad C13-2(2602mil,2576.677mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2614.354mil,1831.685mil) on Top Overlay And Pad C12-2(2599mil,1817.315mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2586.646mil,2651.677mil) on Top Overlay And Pad C13-1(2602mil,2637.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2617.354mil,2562.307mil) on Top Overlay And Pad C14-2(2602mil,2576.677mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2614.685mil,1761.646mil) on Top Overlay And Pad C11-2(2600.315mil,1777mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2617.354mil,2651.677mil) on Top Overlay And Pad C14-1(2602mil,2637.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2614.685mil,1792.354mil) on Top Overlay And Pad C11-2(2600.315mil,1777mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2649.685mil,1392.646mil) on Top Overlay And Pad C21-2(2635.315mil,1408mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2617.354mil,2562.307mil) on Top Overlay And Pad C13-2(2602mil,2576.677mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2649.685mil,1423.354mil) on Top Overlay And Pad C21-2(2635.315mil,1408mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2617.354mil,2651.677mil) on Top Overlay And Pad C13-1(2602mil,2637.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2734.315mil,2289.661mil) on Top Overlay And Pad C13-2(2748.685mil,2305.016mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2734.315mil,2289.661mil) on Top Overlay And Pad C12-2(2748.685mil,2305.016mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2734.315mil,2320.37mil) on Top Overlay And Pad C13-2(2748.685mil,2305.016mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2734.315mil,2320.37mil) on Top Overlay And Pad C12-2(2748.685mil,2305.016mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2734.315mil,2361.646mil) on Top Overlay And Pad C9-2(2748.685mil,2377mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2734.315mil,2361.646mil) on Top Overlay And Pad C8-2(2748.685mil,2377mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2734.315mil,2392.354mil) on Top Overlay And Pad C9-2(2748.685mil,2377mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2734.315mil,2392.354mil) on Top Overlay And Pad C8-2(2748.685mil,2377mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2823.685mil,2289.661mil) on Top Overlay And Pad C13-1(2809.315mil,2305.016mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2823.685mil,2289.661mil) on Top Overlay And Pad C12-1(2809.315mil,2305.016mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2823.685mil,2320.37mil) on Top Overlay And Pad C13-1(2809.315mil,2305.016mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2823.685mil,2320.37mil) on Top Overlay And Pad C12-1(2809.315mil,2305.016mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2823.685mil,2361.646mil) on Top Overlay And Pad C9-1(2809.315mil,2377mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2823.685mil,2361.646mil) on Top Overlay And Pad C8-1(2809.315mil,2377mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2823.685mil,2392.354mil) on Top Overlay And Pad C9-1(2809.315mil,2377mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (2823.685mil,2392.354mil) on Top Overlay And Pad C8-1(2809.315mil,2377mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (2.572mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-1(3174.33mil,2502.637mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [2.572mil]
|
-Silk To Solder Mask Clearance Constraint: (2.572mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-1(3174.33mil,2502.637mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [2.572mil]
|
+Silk To Solder Mask Clearance Constraint: (4.644mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-2(3174.334mil,2209.331mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [4.644mil]
|
-Silk To Solder Mask Clearance Constraint: (4.644mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-2(3174.334mil,2209.331mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [4.644mil]
|
+Silk To Solder Mask Clearance Constraint: (9.793mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-3(3428.346mil,2060.709mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [9.793mil]
|
-Silk To Solder Mask Clearance Constraint: (9.793mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-3(3428.346mil,2060.709mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [9.793mil]
|
+Silk To Solder Mask Clearance Constraint: (2.86mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-4(3682.362mil,2209.331mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [2.86mil]
|
-Silk To Solder Mask Clearance Constraint: (2.86mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-4(3682.362mil,2209.331mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [2.86mil]
|
+Silk To Solder Mask Clearance Constraint: (6.667mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-5(3682.362mil,2502.637mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [6.667mil]
|
-Silk To Solder Mask Clearance Constraint: (6.667mil < 10mil) Between Arc (3428.347mil,2355.984mil) on Top Overlay And Pad H2-5(3682.362mil,2502.637mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [6.667mil]
|
+Silk To Solder Mask Clearance Constraint: (0.322mil < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-1(3580mil,1603.028mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.322mil]
|
-Silk To Solder Mask Clearance Constraint: (0.322mil < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-1(3580mil,1603.028mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.322mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-2(3286.692mil,1603.024mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-2(3286.692mil,1603.024mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (9.793mil < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-3(3138.07mil,1349.012mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [9.793mil]
|
-Silk To Solder Mask Clearance Constraint: (9.793mil < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-3(3138.07mil,1349.012mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [9.793mil]
|
+Silk To Solder Mask Clearance Constraint: (9.455mil < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-4(3286.692mil,1094.996mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [9.455mil]
|
-Silk To Solder Mask Clearance Constraint: (9.455mil < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-4(3286.692mil,1094.996mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [9.455mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-5(3580mil,1094.996mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Arc (3433.346mil,1349.012mil) on Top Overlay And Pad H1-5(3580mil,1094.996mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (695.964mil,3506.646mil) on Top Overlay And Pad C15-1(710.333mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (695.964mil,3506.646mil) on Top Overlay And Pad C14-1(710.333mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (695.964mil,3537.354mil) on Top Overlay And Pad C15-1(710.333mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (695.964mil,3537.354mil) on Top Overlay And Pad C14-1(710.333mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (785.333mil,3537.354mil) on Top Overlay And Pad C15-2(770.963mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (785.333mil,3537.354mil) on Top Overlay And Pad C14-2(770.963mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (785.334mil,3506.646mil) on Top Overlay And Pad C15-2(770.963mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
-Silk To Solder Mask Clearance Constraint: (6.243mil < 10mil) Between Arc (785.334mil,3506.646mil) on Top Overlay And Pad C14-2(770.963mil,3522mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.243mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C10-1(1984.685mil,2273mil) on Top Layer And Track (1954.567mil,2257.646mil)(1954.567mil,2288.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C10-1(2022mil,1977mil) on Top Layer And Track (1990.898mil,1962.433mil)(1990.898mil,1991.37mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C10-1(1984.685mil,2273mil) on Top Layer And Track (1970.315mil,2241.898mil)(1999.252mil,2241.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C10-1(2022mil,1977mil) on Top Layer And Track (2006.646mil,2007.118mil)(2037.354mil,2007.118mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C10-1(1984.685mil,2273mil) on Top Layer And Track (1970.315mil,2304.102mil)(1999.252mil,2304.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C10-1(2022mil,1977mil) on Top Layer And Track (2053.102mil,1962.433mil)(2053.102mil,1991.37mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C10-2(2045.315mil,2273mil) on Top Layer And Track (2030.748mil,2241.898mil)(2059.685mil,2241.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C10-2(2022mil,1916.37mil) on Top Layer And Track (1990.898mil,1902mil)(1990.898mil,1930.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C10-2(2045.315mil,2273mil) on Top Layer And Track (2030.748mil,2304.102mil)(2059.685mil,2304.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C10-2(2022mil,1916.37mil) on Top Layer And Track (2006.646mil,1886.252mil)(2037.354mil,1886.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C10-2(2045.315mil,2273mil) on Top Layer And Track (2075.433mil,2257.646mil)(2075.433mil,2288.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C10-2(2022mil,1916.37mil) on Top Layer And Track (2053.102mil,1902mil)(2053.102mil,1930.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C1-1(1248.055mil,3033mil) on Top Layer And Track (1220.496mil,2968.039mil)(1296.362mil,2968.039mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
-Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C1-1(1248.055mil,3033mil) on Top Layer And Track (1220.496mil,2968.039mil)(1296.362mil,2968.039mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
+Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C1-1(1248.055mil,3033mil) on Top Layer And Track (1220.496mil,3097.961mil)(1296.362mil,3097.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
-Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C1-1(1248.055mil,3033mil) on Top Layer And Track (1220.496mil,3097.961mil)(1296.362mil,3097.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C1-1(1248.055mil,3033mil) on Top Layer And Track (1296.362mil,2968.039mil)(1296.362mil,3097.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C1-1(1248.055mil,3033mil) on Top Layer And Track (1296.362mil,2968.039mil)(1296.362mil,3097.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C11-1(2076mil,1849.685mil) on Top Layer And Track (2044.898mil,1835.315mil)(2044.898mil,1864.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C11-1(2539.685mil,1777mil) on Top Layer And Track (2509.567mil,1761.646mil)(2509.567mil,1792.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C11-1(2076mil,1849.685mil) on Top Layer And Track (2060.646mil,1819.567mil)(2091.354mil,1819.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C11-1(2539.685mil,1777mil) on Top Layer And Track (2525.315mil,1745.898mil)(2554.252mil,1745.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C11-1(2076mil,1849.685mil) on Top Layer And Track (2107.102mil,1835.315mil)(2107.102mil,1864.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C11-1(2539.685mil,1777mil) on Top Layer And Track (2525.315mil,1808.102mil)(2554.252mil,1808.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C11-2(2076mil,1910.315mil) on Top Layer And Track (2044.898mil,1895.748mil)(2044.898mil,1924.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C11-2(2600.315mil,1777mil) on Top Layer And Track (2585.748mil,1745.898mil)(2614.685mil,1745.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C11-2(2076mil,1910.315mil) on Top Layer And Track (2060.646mil,1940.433mil)(2091.354mil,1940.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C11-2(2600.315mil,1777mil) on Top Layer And Track (2585.748mil,1808.102mil)(2614.685mil,1808.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C11-2(2076mil,1910.315mil) on Top Layer And Track (2107.102mil,1895.748mil)(2107.102mil,1924.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C11-2(2600.315mil,1777mil) on Top Layer And Track (2630.433mil,1761.646mil)(2630.433mil,1792.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C1-2(1129.945mil,3033mil) on Top Layer And Track (1081.638mil,2968.039mil)(1081.638mil,3097.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C1-2(1129.945mil,3033mil) on Top Layer And Track (1081.638mil,2968.039mil)(1081.638mil,3097.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C1-2(1129.945mil,3033mil) on Top Layer And Track (1081.638mil,2968.039mil)(1157.504mil,2968.039mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
-Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C1-2(1129.945mil,3033mil) on Top Layer And Track (1081.638mil,2968.039mil)(1157.504mil,2968.039mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
+Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C1-2(1129.945mil,3033mil) on Top Layer And Track (1081.638mil,3097.961mil)(1157.504mil,3097.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
-Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C1-2(1129.945mil,3033mil) on Top Layer And Track (1081.638mil,3097.961mil)(1157.504mil,3097.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C12-1(2599mil,1756.685mil) on Top Layer And Track (2567.898mil,1742.315mil)(2567.898mil,1771.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C12-1(2809.315mil,2305.016mil) on Top Layer And Track (2794.748mil,2273.913mil)(2823.685mil,2273.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C12-1(2599mil,1756.685mil) on Top Layer And Track (2583.646mil,1726.567mil)(2614.354mil,1726.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C12-1(2809.315mil,2305.016mil) on Top Layer And Track (2794.748mil,2336.118mil)(2823.685mil,2336.118mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C12-1(2599mil,1756.685mil) on Top Layer And Track (2630.102mil,1742.315mil)(2630.102mil,1771.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C12-1(2809.315mil,2305.016mil) on Top Layer And Track (2839.433mil,2289.661mil)(2839.433mil,2320.37mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C12-2(2599mil,1817.315mil) on Top Layer And Track (2567.898mil,1802.748mil)(2567.898mil,1831.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C12-2(2748.685mil,2305.016mil) on Top Layer And Track (2718.567mil,2289.661mil)(2718.567mil,2320.37mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C12-2(2599mil,1817.315mil) on Top Layer And Track (2583.646mil,1847.433mil)(2614.354mil,1847.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C12-2(2748.685mil,2305.016mil) on Top Layer And Track (2734.315mil,2273.913mil)(2763.252mil,2273.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C12-2(2599mil,1817.315mil) on Top Layer And Track (2630.102mil,1802.748mil)(2630.102mil,1831.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C12-2(2748.685mil,2305.016mil) on Top Layer And Track (2734.315mil,2336.118mil)(2763.252mil,2336.118mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C13-1(2809.315mil,2305.016mil) on Top Layer And Track (2794.748mil,2273.913mil)(2823.685mil,2273.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C13-1(2602mil,2637.307mil) on Top Layer And Track (2570.898mil,2622.74mil)(2570.898mil,2651.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C13-1(2809.315mil,2305.016mil) on Top Layer And Track (2794.748mil,2336.118mil)(2823.685mil,2336.118mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C13-1(2602mil,2637.307mil) on Top Layer And Track (2586.646mil,2667.425mil)(2617.354mil,2667.425mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C13-1(2809.315mil,2305.016mil) on Top Layer And Track (2839.433mil,2289.661mil)(2839.433mil,2320.37mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C13-1(2602mil,2637.307mil) on Top Layer And Track (2633.102mil,2622.74mil)(2633.102mil,2651.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C13-2(2748.685mil,2305.016mil) on Top Layer And Track (2718.567mil,2289.661mil)(2718.567mil,2320.37mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C13-2(2602mil,2576.677mil) on Top Layer And Track (2570.898mil,2562.307mil)(2570.898mil,2591.244mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C13-2(2748.685mil,2305.016mil) on Top Layer And Track (2734.315mil,2273.913mil)(2763.252mil,2273.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C13-2(2602mil,2576.677mil) on Top Layer And Track (2586.646mil,2546.559mil)(2617.354mil,2546.559mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C13-2(2748.685mil,2305.016mil) on Top Layer And Track (2734.315mil,2336.118mil)(2763.252mil,2336.118mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C13-2(2602mil,2576.677mil) on Top Layer And Track (2633.102mil,2562.307mil)(2633.102mil,2591.244mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C14-1(2602mil,2637.307mil) on Top Layer And Track (2570.898mil,2622.74mil)(2570.898mil,2651.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C14-1(710.333mil,3522mil) on Top Layer And Track (680.216mil,3506.646mil)(680.216mil,3537.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C14-1(2602mil,2637.307mil) on Top Layer And Track (2586.646mil,2667.425mil)(2617.354mil,2667.425mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C14-1(710.333mil,3522mil) on Top Layer And Track (695.963mil,3490.898mil)(724.9mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C14-1(2602mil,2637.307mil) on Top Layer And Track (2633.102mil,2622.74mil)(2633.102mil,2651.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C14-1(710.333mil,3522mil) on Top Layer And Track (695.963mil,3553.102mil)(724.9mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C14-2(2602mil,2576.677mil) on Top Layer And Track (2570.898mil,2562.307mil)(2570.898mil,2591.244mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C14-2(770.963mil,3522mil) on Top Layer And Track (756.397mil,3490.897mil)(785.334mil,3490.897mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C14-2(2602mil,2576.677mil) on Top Layer And Track (2586.646mil,2546.559mil)(2617.354mil,2546.559mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C14-2(770.963mil,3522mil) on Top Layer And Track (756.397mil,3553.102mil)(785.334mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C14-2(2602mil,2576.677mil) on Top Layer And Track (2633.102mil,2562.307mil)(2633.102mil,2591.244mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C14-2(770.963mil,3522mil) on Top Layer And Track (801.082mil,3506.646mil)(801.082mil,3537.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C15-1(710.333mil,3522mil) on Top Layer And Track (680.216mil,3506.646mil)(680.216mil,3537.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C15-1(2402mil,2649.307mil) on Top Layer And Track (2370.898mil,2634.74mil)(2370.898mil,2663.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C15-1(710.333mil,3522mil) on Top Layer And Track (695.963mil,3490.898mil)(724.9mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C15-1(2402mil,2649.307mil) on Top Layer And Track (2386.646mil,2679.425mil)(2417.354mil,2679.425mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C15-1(710.333mil,3522mil) on Top Layer And Track (695.963mil,3553.102mil)(724.9mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C15-1(2402mil,2649.307mil) on Top Layer And Track (2433.102mil,2634.74mil)(2433.102mil,2663.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C15-2(770.963mil,3522mil) on Top Layer And Track (756.397mil,3490.897mil)(785.334mil,3490.897mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C15-2(2402mil,2588.677mil) on Top Layer And Track (2370.898mil,2574.307mil)(2370.898mil,2603.244mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C15-2(770.963mil,3522mil) on Top Layer And Track (756.397mil,3553.102mil)(785.334mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C15-2(2402mil,2588.677mil) on Top Layer And Track (2386.646mil,2558.559mil)(2417.354mil,2558.559mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C15-2(770.963mil,3522mil) on Top Layer And Track (801.082mil,3506.646mil)(801.082mil,3537.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C15-2(2402mil,2588.677mil) on Top Layer And Track (2433.102mil,2574.307mil)(2433.102mil,2603.244mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C16-1(2385mil,2642mil) on Top Layer And Track (2353.898mil,2627.433mil)(2353.898mil,2656.37mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C16-1(2017mil,1738.685mil) on Top Layer And Track (1985.898mil,1724.315mil)(1985.898mil,1753.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C16-1(2385mil,2642mil) on Top Layer And Track (2369.646mil,2672.118mil)(2400.354mil,2672.118mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C16-1(2017mil,1738.685mil) on Top Layer And Track (2001.646mil,1708.567mil)(2032.354mil,1708.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C16-1(2385mil,2642mil) on Top Layer And Track (2416.102mil,2627.433mil)(2416.102mil,2656.37mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C16-1(2017mil,1738.685mil) on Top Layer And Track (2048.102mil,1724.315mil)(2048.102mil,1753.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C16-2(2385mil,2581.37mil) on Top Layer And Track (2353.898mil,2567mil)(2353.898mil,2595.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C16-2(2017mil,1799.315mil) on Top Layer And Track (1985.898mil,1784.748mil)(1985.898mil,1813.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C16-2(2385mil,2581.37mil) on Top Layer And Track (2369.646mil,2551.252mil)(2400.354mil,2551.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C16-2(2017mil,1799.315mil) on Top Layer And Track (2001.646mil,1829.433mil)(2032.354mil,1829.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C16-2(2385mil,2581.37mil) on Top Layer And Track (2416.102mil,2567mil)(2416.102mil,2595.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C16-2(2017mil,1799.315mil) on Top Layer And Track (2048.102mil,1784.748mil)(2048.102mil,1813.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C17-1(1330.318mil,342mil) on Top Layer And Track (1315.751mil,310.898mil)(1344.688mil,310.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C17-1(1052.677mil,215.291mil) on Top Layer And Track (1022.559mil,199.937mil)(1022.559mil,230.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C17-1(1330.318mil,342mil) on Top Layer And Track (1315.751mil,373.102mil)(1344.688mil,373.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C17-1(1052.677mil,215.291mil) on Top Layer And Track (1038.307mil,184.189mil)(1067.244mil,184.189mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C17-1(1330.318mil,342mil) on Top Layer And Track (1360.436mil,326.646mil)(1360.436mil,357.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C17-1(1052.677mil,215.291mil) on Top Layer And Track (1038.307mil,246.394mil)(1067.244mil,246.394mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C17-2(1269.688mil,342mil) on Top Layer And Track (1239.57mil,326.646mil)(1239.57mil,357.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C17-2(1113.307mil,215.291mil) on Top Layer And Track (1098.74mil,184.189mil)(1127.677mil,184.189mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C17-2(1269.688mil,342mil) on Top Layer And Track (1255.318mil,310.898mil)(1284.255mil,310.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C17-2(1113.307mil,215.291mil) on Top Layer And Track (1098.74mil,246.394mil)(1127.677mil,246.394mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C17-2(1269.688mil,342mil) on Top Layer And Track (1255.318mil,373.103mil)(1284.255mil,373.103mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C17-2(1113.307mil,215.291mil) on Top Layer And Track (1143.425mil,199.937mil)(1143.425mil,230.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C18-1(1052.677mil,215.291mil) on Top Layer And Track (1022.559mil,199.937mil)(1022.559mil,230.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C18-1(1052.677mil,129.291mil) on Top Layer And Track (1022.559mil,113.937mil)(1022.559mil,144.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C18-1(1052.677mil,215.291mil) on Top Layer And Track (1038.307mil,184.189mil)(1067.244mil,184.189mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C18-1(1052.677mil,129.291mil) on Top Layer And Track (1038.307mil,160.394mil)(1067.244mil,160.394mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C18-1(1052.677mil,215.291mil) on Top Layer And Track (1038.307mil,246.394mil)(1067.244mil,246.394mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C18-1(1052.677mil,129.291mil) on Top Layer And Track (1038.307mil,98.189mil)(1067.244mil,98.189mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C18-2(1113.307mil,215.291mil) on Top Layer And Track (1098.74mil,184.189mil)(1127.677mil,184.189mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C18-2(1113.307mil,129.291mil) on Top Layer And Track (1098.74mil,160.394mil)(1127.677mil,160.394mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C18-2(1113.307mil,215.291mil) on Top Layer And Track (1098.74mil,246.394mil)(1127.677mil,246.394mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C18-2(1113.307mil,129.291mil) on Top Layer And Track (1098.74mil,98.189mil)(1127.677mil,98.189mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C18-2(1113.307mil,215.291mil) on Top Layer And Track (1143.425mil,199.937mil)(1143.425mil,230.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C18-2(1113.307mil,129.291mil) on Top Layer And Track (1143.425mil,113.937mil)(1143.425mil,144.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C19-1(1052.677mil,129.291mil) on Top Layer And Track (1022.559mil,113.937mil)(1022.559mil,144.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C19-1(1885mil,1028.315mil) on Top Layer And Track (1853.898mil,1013.748mil)(1853.898mil,1042.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C19-1(1052.677mil,129.291mil) on Top Layer And Track (1038.307mil,160.394mil)(1067.244mil,160.394mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C19-1(1885mil,1028.315mil) on Top Layer And Track (1869.646mil,1058.433mil)(1900.354mil,1058.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C19-1(1052.677mil,129.291mil) on Top Layer And Track (1038.307mil,98.189mil)(1067.244mil,98.189mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C19-1(1885mil,1028.315mil) on Top Layer And Track (1916.102mil,1013.748mil)(1916.102mil,1042.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C19-2(1113.307mil,129.291mil) on Top Layer And Track (1098.74mil,160.394mil)(1127.677mil,160.394mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C19-2(1885mil,967.685mil) on Top Layer And Track (1853.898mil,953.315mil)(1853.898mil,982.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C19-2(1113.307mil,129.291mil) on Top Layer And Track (1098.74mil,98.189mil)(1127.677mil,98.189mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C19-2(1885mil,967.685mil) on Top Layer And Track (1869.646mil,937.567mil)(1900.354mil,937.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C19-2(1113.307mil,129.291mil) on Top Layer And Track (1143.425mil,113.937mil)(1143.425mil,144.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C19-2(1885mil,967.685mil) on Top Layer And Track (1916.102mil,953.315mil)(1916.102mil,982.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C20-1(1885mil,1028.315mil) on Top Layer And Track (1853.898mil,1013.748mil)(1853.898mil,1042.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C20-1(2009.853mil,1410.75mil) on Top Layer And Track (1995.286mil,1379.648mil)(2024.223mil,1379.648mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C20-1(1885mil,1028.315mil) on Top Layer And Track (1869.646mil,1058.433mil)(1900.354mil,1058.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C20-1(2009.853mil,1410.75mil) on Top Layer And Track (1995.286mil,1441.853mil)(2024.223mil,1441.853mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C20-1(1885mil,1028.315mil) on Top Layer And Track (1916.102mil,1013.748mil)(1916.102mil,1042.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C20-1(2009.853mil,1410.75mil) on Top Layer And Track (2039.971mil,1395.396mil)(2039.971mil,1426.105mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C20-2(1885mil,967.685mil) on Top Layer And Track (1853.898mil,953.315mil)(1853.898mil,982.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C20-2(1949.223mil,1410.75mil) on Top Layer And Track (1919.105mil,1395.396mil)(1919.105mil,1426.105mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C20-2(1885mil,967.685mil) on Top Layer And Track (1869.646mil,937.567mil)(1900.354mil,937.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C20-2(1949.223mil,1410.75mil) on Top Layer And Track (1934.852mil,1441.853mil)(1963.79mil,1441.853mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C20-2(1885mil,967.685mil) on Top Layer And Track (1916.102mil,953.315mil)(1916.102mil,982.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C20-2(1949.223mil,1410.75mil) on Top Layer And Track (1934.853mil,1379.648mil)(1963.79mil,1379.648mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C2-1(1619.685mil,3421mil) on Top Layer And Track (1589.567mil,3405.646mil)(1589.567mil,3436.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C2-1(1619.685mil,3421mil) on Top Layer And Track (1589.567mil,3405.646mil)(1589.567mil,3436.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C2-1(1619.685mil,3421mil) on Top Layer And Track (1605.315mil,3389.898mil)(1634.252mil,3389.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C2-1(1619.685mil,3421mil) on Top Layer And Track (1605.315mil,3389.898mil)(1634.252mil,3389.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C2-1(1619.685mil,3421mil) on Top Layer And Track (1605.315mil,3452.102mil)(1634.252mil,3452.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C2-1(1619.685mil,3421mil) on Top Layer And Track (1605.315mil,3452.102mil)(1634.252mil,3452.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C21-1(2574.685mil,1408mil) on Top Layer And Track (2544.567mil,1392.646mil)(2544.567mil,1423.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C21-1(1275.963mil,3522mil) on Top Layer And Track (1261.396mil,3490.898mil)(1290.333mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C21-1(2574.685mil,1408mil) on Top Layer And Track (2560.315mil,1376.898mil)(2589.252mil,1376.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C21-1(1275.963mil,3522mil) on Top Layer And Track (1261.396mil,3553.102mil)(1290.333mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C21-1(2574.685mil,1408mil) on Top Layer And Track (2560.315mil,1439.102mil)(2589.252mil,1439.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C21-1(1275.963mil,3522mil) on Top Layer And Track (1306.081mil,3506.646mil)(1306.081mil,3537.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C21-2(2635.315mil,1408mil) on Top Layer And Track (2620.748mil,1376.898mil)(2649.685mil,1376.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C21-2(1215.333mil,3522mil) on Top Layer And Track (1185.215mil,3506.646mil)(1185.215mil,3537.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C21-2(2635.315mil,1408mil) on Top Layer And Track (2620.748mil,1439.102mil)(2649.685mil,1439.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C21-2(1215.333mil,3522mil) on Top Layer And Track (1200.963mil,3490.898mil)(1229.9mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C21-2(2635.315mil,1408mil) on Top Layer And Track (2665.433mil,1392.646mil)(2665.433mil,1423.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C21-2(1215.333mil,3522mil) on Top Layer And Track (1200.963mil,3553.102mil)(1229.9mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C2-2(1680.315mil,3421mil) on Top Layer And Track (1665.748mil,3389.898mil)(1694.685mil,3389.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C2-2(1680.315mil,3421mil) on Top Layer And Track (1665.748mil,3389.898mil)(1694.685mil,3389.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C2-2(1680.315mil,3421mil) on Top Layer And Track (1665.748mil,3452.102mil)(1694.685mil,3452.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C2-2(1680.315mil,3421mil) on Top Layer And Track (1665.748mil,3452.102mil)(1694.685mil,3452.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C2-2(1680.315mil,3421mil) on Top Layer And Track (1710.433mil,3405.646mil)(1710.433mil,3436.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C2-2(1680.315mil,3421mil) on Top Layer And Track (1710.433mil,3405.646mil)(1710.433mil,3436.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C3-1(1187.685mil,2920mil) on Top Layer And Track (1157.567mil,2904.646mil)(1157.567mil,2935.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C3-1(1187.685mil,2920mil) on Top Layer And Track (1157.567mil,2904.646mil)(1157.567mil,2935.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C3-1(1187.685mil,2920mil) on Top Layer And Track (1173.315mil,2888.898mil)(1202.252mil,2888.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C3-1(1187.685mil,2920mil) on Top Layer And Track (1173.315mil,2888.898mil)(1202.252mil,2888.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C3-1(1187.685mil,2920mil) on Top Layer And Track (1173.315mil,2951.102mil)(1202.252mil,2951.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C3-1(1187.685mil,2920mil) on Top Layer And Track (1173.315mil,2951.102mil)(1202.252mil,2951.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C3-2(1248.315mil,2920mil) on Top Layer And Track (1233.748mil,2888.898mil)(1262.685mil,2888.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C3-2(1248.315mil,2920mil) on Top Layer And Track (1233.748mil,2888.898mil)(1262.685mil,2888.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C3-2(1248.315mil,2920mil) on Top Layer And Track (1233.748mil,2951.102mil)(1262.685mil,2951.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C3-2(1248.315mil,2920mil) on Top Layer And Track (1233.748mil,2951.102mil)(1262.685mil,2951.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C3-2(1248.315mil,2920mil) on Top Layer And Track (1278.433mil,2904.646mil)(1278.433mil,2935.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C3-2(1248.315mil,2920mil) on Top Layer And Track (1278.433mil,2904.646mil)(1278.433mil,2935.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C4-1(1563.945mil,3170mil) on Top Layer And Track (1515.638mil,3105.039mil)(1515.638mil,3234.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C4-1(1563.945mil,3170mil) on Top Layer And Track (1515.638mil,3105.039mil)(1515.638mil,3234.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C4-1(1563.945mil,3170mil) on Top Layer And Track (1515.638mil,3105.039mil)(1591.504mil,3105.039mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
-Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C4-1(1563.945mil,3170mil) on Top Layer And Track (1515.638mil,3105.039mil)(1591.504mil,3105.039mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
+Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C4-1(1563.945mil,3170mil) on Top Layer And Track (1515.638mil,3234.961mil)(1591.504mil,3234.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
-Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C4-1(1563.945mil,3170mil) on Top Layer And Track (1515.638mil,3234.961mil)(1591.504mil,3234.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
+Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C4-2(1682.055mil,3170mil) on Top Layer And Track (1654.496mil,3105.039mil)(1730.362mil,3105.039mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
-Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C4-2(1682.055mil,3170mil) on Top Layer And Track (1654.496mil,3105.039mil)(1730.362mil,3105.039mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
+Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C4-2(1682.055mil,3170mil) on Top Layer And Track (1654.496mil,3234.961mil)(1730.362mil,3234.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
-Silk To Solder Mask Clearance Constraint: (8.78mil < 10mil) Between Pad C4-2(1682.055mil,3170mil) on Top Layer And Track (1654.496mil,3234.961mil)(1730.362mil,3234.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.78mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C4-2(1682.055mil,3170mil) on Top Layer And Track (1730.362mil,3105.039mil)(1730.362mil,3234.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C4-2(1682.055mil,3170mil) on Top Layer And Track (1730.362mil,3105.039mil)(1730.362mil,3234.961mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C5-1(1435mil,3231.315mil) on Top Layer And Track (1403.898mil,3216.748mil)(1403.898mil,3245.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C5-1(1435mil,3231.315mil) on Top Layer And Track (1403.898mil,3216.748mil)(1403.898mil,3245.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C5-1(1435mil,3231.315mil) on Top Layer And Track (1419.646mil,3261.433mil)(1450.354mil,3261.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C5-1(1435mil,3231.315mil) on Top Layer And Track (1419.646mil,3261.433mil)(1450.354mil,3261.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C5-1(1435mil,3231.315mil) on Top Layer And Track (1466.102mil,3216.748mil)(1466.102mil,3245.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C5-1(1435mil,3231.315mil) on Top Layer And Track (1466.102mil,3216.748mil)(1466.102mil,3245.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C5-2(1435mil,3170.685mil) on Top Layer And Track (1403.898mil,3156.315mil)(1403.898mil,3185.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C5-2(1435mil,3170.685mil) on Top Layer And Track (1403.898mil,3156.315mil)(1403.898mil,3185.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C5-2(1435mil,3170.685mil) on Top Layer And Track (1419.646mil,3140.567mil)(1450.354mil,3140.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C5-2(1435mil,3170.685mil) on Top Layer And Track (1419.646mil,3140.567mil)(1450.354mil,3140.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C5-2(1435mil,3170.685mil) on Top Layer And Track (1466.102mil,3156.315mil)(1466.102mil,3185.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C5-2(1435mil,3170.685mil) on Top Layer And Track (1466.102mil,3156.315mil)(1466.102mil,3185.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C6-1(1275.963mil,3522mil) on Top Layer And Track (1261.396mil,3490.898mil)(1290.333mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C6-1(2002.685mil,2583.667mil) on Top Layer And Track (1972.567mil,2568.312mil)(1972.567mil,2599.021mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C6-1(1275.963mil,3522mil) on Top Layer And Track (1261.396mil,3553.102mil)(1290.333mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C6-1(2002.685mil,2583.667mil) on Top Layer And Track (1988.315mil,2552.564mil)(2017.252mil,2552.564mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C6-1(1275.963mil,3522mil) on Top Layer And Track (1306.081mil,3506.646mil)(1306.081mil,3537.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C6-1(2002.685mil,2583.667mil) on Top Layer And Track (1988.315mil,2614.769mil)(2017.252mil,2614.769mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C6-2(1215.333mil,3522mil) on Top Layer And Track (1185.215mil,3506.646mil)(1185.215mil,3537.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C6-2(2063.315mil,2583.667mil) on Top Layer And Track (2048.748mil,2552.564mil)(2077.685mil,2552.564mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C6-2(1215.333mil,3522mil) on Top Layer And Track (1200.963mil,3490.898mil)(1229.9mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C6-2(2063.315mil,2583.667mil) on Top Layer And Track (2048.748mil,2614.769mil)(2077.685mil,2614.769mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C6-2(1215.333mil,3522mil) on Top Layer And Track (1200.963mil,3553.102mil)(1229.9mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C6-2(2063.315mil,2583.667mil) on Top Layer And Track (2093.433mil,2568.312mil)(2093.433mil,2599.021mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C7-1(2002.685mil,2583.667mil) on Top Layer And Track (1972.567mil,2568.312mil)(1972.567mil,2599.021mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C7-1(2002.685mil,2507mil) on Top Layer And Track (1972.567mil,2491.646mil)(1972.567mil,2522.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C7-1(2002.685mil,2583.667mil) on Top Layer And Track (1988.315mil,2552.564mil)(2017.252mil,2552.564mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C7-1(2002.685mil,2507mil) on Top Layer And Track (1988.315mil,2475.898mil)(2017.252mil,2475.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C7-1(2002.685mil,2583.667mil) on Top Layer And Track (1988.315mil,2614.769mil)(2017.252mil,2614.769mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C7-1(2002.685mil,2507mil) on Top Layer And Track (1988.315mil,2538.102mil)(2017.252mil,2538.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C7-2(2063.315mil,2583.667mil) on Top Layer And Track (2048.748mil,2552.564mil)(2077.685mil,2552.564mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C7-2(2063.315mil,2507mil) on Top Layer And Track (2048.748mil,2475.898mil)(2077.685mil,2475.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C7-2(2063.315mil,2583.667mil) on Top Layer And Track (2048.748mil,2614.769mil)(2077.685mil,2614.769mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C7-2(2063.315mil,2507mil) on Top Layer And Track (2048.748mil,2538.102mil)(2077.685mil,2538.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C7-2(2063.315mil,2583.667mil) on Top Layer And Track (2093.433mil,2568.312mil)(2093.433mil,2599.021mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C7-2(2063.315mil,2507mil) on Top Layer And Track (2093.433mil,2491.646mil)(2093.433mil,2522.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C8-1(2002.685mil,2507mil) on Top Layer And Track (1972.567mil,2491.646mil)(1972.567mil,2522.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C8-1(2809.315mil,2377mil) on Top Layer And Track (2794.748mil,2345.898mil)(2823.685mil,2345.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C8-1(2002.685mil,2507mil) on Top Layer And Track (1988.315mil,2475.898mil)(2017.252mil,2475.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C8-1(2809.315mil,2377mil) on Top Layer And Track (2794.748mil,2408.102mil)(2823.685mil,2408.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C8-1(2002.685mil,2507mil) on Top Layer And Track (1988.315mil,2538.102mil)(2017.252mil,2538.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C8-1(2809.315mil,2377mil) on Top Layer And Track (2839.433mil,2361.646mil)(2839.433mil,2392.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C8-2(2063.315mil,2507mil) on Top Layer And Track (2048.748mil,2475.898mil)(2077.685mil,2475.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C8-2(2748.685mil,2377mil) on Top Layer And Track (2718.567mil,2361.646mil)(2718.567mil,2392.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C8-2(2063.315mil,2507mil) on Top Layer And Track (2048.748mil,2538.102mil)(2077.685mil,2538.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C8-2(2748.685mil,2377mil) on Top Layer And Track (2734.315mil,2345.898mil)(2763.252mil,2345.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C8-2(2063.315mil,2507mil) on Top Layer And Track (2093.433mil,2491.646mil)(2093.433mil,2522.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C8-2(2748.685mil,2377mil) on Top Layer And Track (2734.315mil,2408.102mil)(2763.252mil,2408.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C9-1(2809.315mil,2377mil) on Top Layer And Track (2794.748mil,2345.898mil)(2823.685mil,2345.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C9-1(1985.685mil,2263mil) on Top Layer And Track (1955.567mil,2247.646mil)(1955.567mil,2278.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C9-1(2809.315mil,2377mil) on Top Layer And Track (2794.748mil,2408.102mil)(2823.685mil,2408.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C9-1(1985.685mil,2263mil) on Top Layer And Track (1971.315mil,2231.898mil)(2000.252mil,2231.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C9-1(2809.315mil,2377mil) on Top Layer And Track (2839.433mil,2361.646mil)(2839.433mil,2392.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C9-1(1985.685mil,2263mil) on Top Layer And Track (1971.315mil,2294.102mil)(2000.252mil,2294.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C9-2(2748.685mil,2377mil) on Top Layer And Track (2718.567mil,2361.646mil)(2718.567mil,2392.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
-Silk To Solder Mask Clearance Constraint: (8.513mil < 10mil) Between Pad C9-2(2046.315mil,2263mil) on Top Layer And Track (2031.748mil,2231.898mil)(2060.685mil,2231.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.513mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad C9-2(2748.685mil,2377mil) on Top Layer And Track (2734.315mil,2345.898mil)(2763.252mil,2345.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C9-2(2046.315mil,2263mil) on Top Layer And Track (2031.748mil,2294.102mil)(2060.685mil,2294.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C9-2(2748.685mil,2377mil) on Top Layer And Track (2734.315mil,2408.102mil)(2763.252mil,2408.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad C9-2(2046.315mil,2263mil) on Top Layer And Track (2076.433mil,2247.646mil)(2076.433mil,2278.354mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.152mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1457.391mil,2949.216mil)(1457.391mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.152mil]
|
-Silk To Solder Mask Clearance Constraint: (7.152mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1457.391mil,2949.216mil)(1457.391mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.152mil]
|
+Silk To Solder Mask Clearance Constraint: (6.052mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1457.391mil,2949.216mil)(1505.091mil,2949.216mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.052mil]
|
-Silk To Solder Mask Clearance Constraint: (6.052mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1457.391mil,2949.216mil)(1505.091mil,2949.216mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.052mil]
|
+Silk To Solder Mask Clearance Constraint: (3.382mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1470.371mil,2994.146mil)(1481.251mil,3014.386mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [3.382mil]
|
-Silk To Solder Mask Clearance Constraint: (3.382mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1470.371mil,2994.146mil)(1481.251mil,3014.386mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [3.382mil]
|
+Silk To Solder Mask Clearance Constraint: (3.382mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1470.371mil,2994.146mil)(1492.211mil,2994.146mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [3.382mil]
|
-Silk To Solder Mask Clearance Constraint: (3.382mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1470.371mil,2994.146mil)(1492.211mil,2994.146mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [3.382mil]
|
+Silk To Solder Mask Clearance Constraint: (3.382mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1481.251mil,3014.386mil)(1492.211mil,2994.146mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [3.382mil]
|
-Silk To Solder Mask Clearance Constraint: (3.382mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1481.251mil,3014.386mil)(1492.211mil,2994.146mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [3.382mil]
|
+Silk To Solder Mask Clearance Constraint: (7.052mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1505.091mil,2949.216mil)(1505.091mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.052mil]
|
-Silk To Solder Mask Clearance Constraint: (7.052mil < 10mil) Between Pad D1-A(1481.291mil,2972.016mil) on Top Layer And Track (1505.091mil,2949.216mil)(1505.091mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.052mil]
|
+Silk To Solder Mask Clearance Constraint: (7.152mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1457.391mil,2949.216mil)(1457.391mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.152mil]
|
-Silk To Solder Mask Clearance Constraint: (7.152mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1457.391mil,2949.216mil)(1457.391mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.152mil]
|
+Silk To Solder Mask Clearance Constraint: (6.61mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1457.391mil,3058.366mil)(1505.091mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.61mil]
|
-Silk To Solder Mask Clearance Constraint: (6.61mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1457.391mil,3058.366mil)(1505.091mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.61mil]
|
+Silk To Solder Mask Clearance Constraint: (1.874mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1470.371mil,2994.146mil)(1481.251mil,3014.386mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [1.874mil]
|
-Silk To Solder Mask Clearance Constraint: (1.874mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1470.371mil,2994.146mil)(1481.251mil,3014.386mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [1.874mil]
|
+Silk To Solder Mask Clearance Constraint: (1.874mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1481.251mil,3014.386mil)(1492.211mil,2994.146mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [1.874mil]
|
-Silk To Solder Mask Clearance Constraint: (1.874mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1481.251mil,3014.386mil)(1492.211mil,2994.146mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [1.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.052mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1505.091mil,2949.216mil)(1505.091mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.052mil]
|
-Silk To Solder Mask Clearance Constraint: (7.052mil < 10mil) Between Pad D1-K(1481.291mil,3035.008mil) on Top Layer And Track (1505.091mil,2949.216mil)(1505.091mil,3058.366mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.052mil]
|
+Silk To Solder Mask Clearance Constraint: (7.942mil < 10mil) Between Pad J1-2(1680mil,3540mil) on Top Layer And Track (1533.134mil,3497.531mil)(1681.947mil,3497.531mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.942mil]
|
-Silk To Solder Mask Clearance Constraint: (7.942mil < 10mil) Between Pad J1-2(1680mil,3540mil) on Top Layer And Track (1533.134mil,3497.531mil)(1681.947mil,3497.531mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.942mil]
|
+Silk To Solder Mask Clearance Constraint: (9.924mil < 10mil) Between Pad J1-3(1443.78mil,3567.559mil) on Top Layer And Track (1408.826mil,3612.011mil)(1408.826mil,3707.867mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.924mil]
|
-Silk To Solder Mask Clearance Constraint: (9.924mil < 10mil) Between Pad J1-3(1443.78mil,3567.559mil) on Top Layer And Track (1408.826mil,3612.011mil)(1408.826mil,3707.867mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.924mil]
|
+Silk To Solder Mask Clearance Constraint: (7.41mil < 10mil) Between Pad J1-4(1430mil,3764.41mil) on Top Layer And Track (1408.826mil,3816.19mil)(1408.826mil,3882.52mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.41mil]
|
-Silk To Solder Mask Clearance Constraint: (7.41mil < 10mil) Between Pad J1-4(1430mil,3764.41mil) on Top Layer And Track (1408.826mil,3816.19mil)(1408.826mil,3882.52mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.41mil]
|
+Silk To Solder Mask Clearance Constraint: (7.41mil < 10mil) Between Pad J1-4(1737.087mil,3764.41mil) on Top Layer And Track (1706.452mil,3816.19mil)(1706.452mil,3882.52mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.41mil]
|
-Silk To Solder Mask Clearance Constraint: (7.41mil < 10mil) Between Pad J1-4(1737.087mil,3764.41mil) on Top Layer And Track (1706.452mil,3816.19mil)(1706.452mil,3882.52mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.41mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad J2-1(2157.142mil,158mil) on Top Layer And Track (2158.543mil,205.781mil)(2158.543mil,217.423mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad J2-1(2157.142mil,158mil) on Top Layer And Track (2158.543mil,205.781mil)(2158.543mil,217.423mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad J2-1(2157.142mil,158mil) on Top Layer And Track (2159.164mil,92.15mil)(2159.164mil,111.078mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad J2-1(2157.142mil,158mil) on Top Layer And Track (2159.164mil,92.15mil)(2159.164mil,111.078mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (0.429mil < 10mil) Between Pad J2-2(2099.071mil,217.055mil) on Top Layer And Track (2039.538mil,217.423mil)(2073.957mil,217.423mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.429mil]
|
-Silk To Solder Mask Clearance Constraint: (0.429mil < 10mil) Between Pad J2-2(2099.071mil,217.055mil) on Top Layer And Track (2039.538mil,217.423mil)(2073.957mil,217.423mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.429mil]
|
+Silk To Solder Mask Clearance Constraint: (0.368mil < 10mil) Between Pad J2-2(2099.071mil,217.055mil) on Top Layer And Track (2124.124mil,217.423mil)(2158.543mil,217.423mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.368mil]
|
-Silk To Solder Mask Clearance Constraint: (0.368mil < 10mil) Between Pad J2-2(2099.071mil,217.055mil) on Top Layer And Track (2124.124mil,217.423mil)(2158.543mil,217.423mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.368mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad J2-3(2041mil,158mil) on Top Layer And Track (2038.872mil,92.15mil)(2038.872mil,111.078mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad J2-3(2041mil,158mil) on Top Layer And Track (2038.872mil,92.15mil)(2038.872mil,111.078mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad J2-3(2041mil,158mil) on Top Layer And Track (2039.538mil,205.781mil)(2039.538mil,217.423mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad J2-3(2041mil,158mil) on Top Layer And Track (2039.538mil,205.781mil)(2039.538mil,217.423mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (5.227mil < 10mil) Between Pad K1-2(1327.732mil,3681.102mil) on Multi-Layer And Track (1363.165mil,3591.785mil)(1363.165mil,3877.953mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.227mil]
|
-Silk To Solder Mask Clearance Constraint: (5.227mil < 10mil) Between Pad K1-2(948.819mil,3681.102mil) on Multi-Layer And Track (984.252mil,3591.785mil)(984.252mil,3877.953mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.227mil]
|
+Silk To Solder Mask Clearance Constraint: (4.253mil < 10mil) Between Pad K1-4(1044.268mil,3681.102mil) on Multi-Layer And Track (1008.835mil,3591.785mil)(1008.835mil,3877.953mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.253mil]
|
-Silk To Solder Mask Clearance Constraint: (4.253mil < 10mil) Between Pad K1-4(665.354mil,3681.102mil) on Multi-Layer And Track (629.921mil,3591.785mil)(629.921mil,3877.953mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.253mil]
|
+Silk To Solder Mask Clearance Constraint: (5.227mil < 10mil) Between Pad K2-2(948.819mil,3681.102mil) on Multi-Layer And Track (984.252mil,3591.785mil)(984.252mil,3877.953mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.227mil]
|
-Silk To Solder Mask Clearance Constraint: (5.227mil < 10mil) Between Pad K2-2(1327.732mil,3681.102mil) on Multi-Layer And Track (1363.165mil,3591.785mil)(1363.165mil,3877.953mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.227mil]
|
+Silk To Solder Mask Clearance Constraint: (4.253mil < 10mil) Between Pad K2-4(665.354mil,3681.102mil) on Multi-Layer And Track (629.921mil,3591.785mil)(629.921mil,3877.953mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.253mil]
|
-Silk To Solder Mask Clearance Constraint: (4.253mil < 10mil) Between Pad K2-4(1044.268mil,3681.102mil) on Multi-Layer And Track (1008.835mil,3591.785mil)(1008.835mil,3877.953mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.253mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-1(963.667mil,748.63mil) on Top Layer And Track (932.564mil,734.063mil)(932.564mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R10-1(1947mil,1738.685mil) on Top Layer And Track (1915.898mil,1708.567mil)(1915.898mil,1753.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-1(963.667mil,748.63mil) on Top Layer And Track (932.564mil,778.748mil)(994.769mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-1(1947mil,1738.685mil) on Top Layer And Track (1915.898mil,1708.567mil)(1978.102mil,1708.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-1(963.667mil,748.63mil) on Top Layer And Track (994.769mil,734.063mil)(994.769mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-1(1947mil,1738.685mil) on Top Layer And Track (1978.102mil,1708.567mil)(1978.102mil,1753.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R10-2(963.667mil,688mil) on Top Layer And Track (932.564mil,657.882mil)(932.564mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-2(1947mil,1799.315mil) on Top Layer And Track (1915.898mil,1784.748mil)(1915.898mil,1829.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-2(963.667mil,688mil) on Top Layer And Track (932.564mil,657.882mil)(994.769mil,657.882mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-2(1947mil,1799.315mil) on Top Layer And Track (1915.898mil,1829.433mil)(1978.102mil,1829.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-2(963.667mil,688mil) on Top Layer And Track (994.769mil,657.882mil)(994.769mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R10-2(1947mil,1799.315mil) on Top Layer And Track (1978.102mil,1784.748mil)(1978.102mil,1829.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-1(1409.291mil,3032.323mil) on Top Layer And Track (1378.189mil,3017.756mil)(1378.189mil,3062.441mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-1(1409.291mil,3032.323mil) on Top Layer And Track (1378.189mil,3017.756mil)(1378.189mil,3062.441mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-1(1409.291mil,3032.323mil) on Top Layer And Track (1378.189mil,3062.441mil)(1440.394mil,3062.441mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-1(1409.291mil,3032.323mil) on Top Layer And Track (1378.189mil,3062.441mil)(1440.394mil,3062.441mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-1(1409.291mil,3032.323mil) on Top Layer And Track (1440.394mil,3017.756mil)(1440.394mil,3062.441mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-1(1409.291mil,3032.323mil) on Top Layer And Track (1440.394mil,3017.756mil)(1440.394mil,3062.441mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-1(1330.318mil,264mil) on Top Layer And Track (1315.751mil,232.898mil)(1360.436mil,232.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R11-1(1116.333mil,688mil) on Top Layer And Track (1085.231mil,657.882mil)(1085.231mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-1(1330.318mil,264mil) on Top Layer And Track (1315.751mil,295.102mil)(1360.436mil,295.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-1(1116.333mil,688mil) on Top Layer And Track (1085.231mil,657.882mil)(1147.436mil,657.882mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-1(1330.318mil,264mil) on Top Layer And Track (1360.436mil,232.898mil)(1360.436mil,295.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-1(1116.333mil,688mil) on Top Layer And Track (1147.436mil,657.882mil)(1147.436mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-2(1269.688mil,264mil) on Top Layer And Track (1239.57mil,232.898mil)(1239.57mil,295.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-2(1116.333mil,748.63mil) on Top Layer And Track (1085.231mil,734.063mil)(1085.231mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R11-2(1269.688mil,264mil) on Top Layer And Track (1239.57mil,232.898mil)(1284.255mil,232.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-2(1116.333mil,748.63mil) on Top Layer And Track (1085.231mil,778.748mil)(1147.436mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-2(1269.688mil,264mil) on Top Layer And Track (1239.57mil,295.102mil)(1284.255mil,295.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R11-2(1116.333mil,748.63mil) on Top Layer And Track (1147.436mil,734.063mil)(1147.436mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R1-2(1409.291mil,2971.693mil) on Top Layer And Track (1378.189mil,2941.575mil)(1378.189mil,2986.26mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R1-2(1409.291mil,2971.693mil) on Top Layer And Track (1378.189mil,2941.575mil)(1378.189mil,2986.26mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-2(1409.291mil,2971.693mil) on Top Layer And Track (1378.189mil,2941.575mil)(1440.394mil,2941.575mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-2(1409.291mil,2971.693mil) on Top Layer And Track (1378.189mil,2941.575mil)(1440.394mil,2941.575mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-2(1409.291mil,2971.693mil) on Top Layer And Track (1440.394mil,2941.575mil)(1440.394mil,2986.26mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R1-2(1409.291mil,2971.693mil) on Top Layer And Track (1440.394mil,2941.575mil)(1440.394mil,2986.26mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R12-1(1116.333mil,688mil) on Top Layer And Track (1085.231mil,657.882mil)(1085.231mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R12-1(887.333mil,688mil) on Top Layer And Track (856.231mil,657.882mil)(856.231mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-1(1116.333mil,688mil) on Top Layer And Track (1085.231mil,657.882mil)(1147.436mil,657.882mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-1(887.333mil,688mil) on Top Layer And Track (856.231mil,657.882mil)(918.436mil,657.882mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-1(1116.333mil,688mil) on Top Layer And Track (1147.436mil,657.882mil)(1147.436mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-1(887.333mil,688mil) on Top Layer And Track (918.436mil,657.882mil)(918.436mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-2(1116.333mil,748.63mil) on Top Layer And Track (1085.231mil,734.063mil)(1085.231mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-2(887.333mil,748.63mil) on Top Layer And Track (856.231mil,734.063mil)(856.231mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-2(1116.333mil,748.63mil) on Top Layer And Track (1085.231mil,778.748mil)(1147.436mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-2(887.333mil,748.63mil) on Top Layer And Track (856.231mil,778.748mil)(918.436mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-2(1116.333mil,748.63mil) on Top Layer And Track (1147.436mil,734.063mil)(1147.436mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R12-2(887.333mil,748.63mil) on Top Layer And Track (918.436mil,734.063mil)(918.436mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R13-1(887.333mil,688mil) on Top Layer And Track (856.231mil,657.882mil)(856.231mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-1(2009.853mil,1504.75mil) on Top Layer And Track (1995.286mil,1473.648mil)(2039.971mil,1473.648mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-1(887.333mil,688mil) on Top Layer And Track (856.231mil,657.882mil)(918.436mil,657.882mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-1(2009.853mil,1504.75mil) on Top Layer And Track (1995.286mil,1535.853mil)(2039.971mil,1535.853mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-1(887.333mil,688mil) on Top Layer And Track (918.436mil,657.882mil)(918.436mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-1(2009.853mil,1504.75mil) on Top Layer And Track (2039.971mil,1473.648mil)(2039.971mil,1535.853mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-2(887.333mil,748.63mil) on Top Layer And Track (856.231mil,734.063mil)(856.231mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-2(1949.223mil,1504.75mil) on Top Layer And Track (1919.105mil,1473.648mil)(1919.105mil,1535.853mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-2(887.333mil,748.63mil) on Top Layer And Track (856.231mil,778.748mil)(918.436mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R13-2(1949.223mil,1504.75mil) on Top Layer And Track (1919.105mil,1473.648mil)(1963.79mil,1473.648mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-2(887.333mil,748.63mil) on Top Layer And Track (918.436mil,734.063mil)(918.436mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R13-2(1949.223mil,1504.75mil) on Top Layer And Track (1919.105mil,1535.853mil)(1963.79mil,1535.853mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-1(2574.685mil,1492mil) on Top Layer And Track (2544.567mil,1460.898mil)(2544.567mil,1523.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-1(1047mil,3522mil) on Top Layer And Track (1016.882mil,3490.898mil)(1016.882mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R14-1(2574.685mil,1492mil) on Top Layer And Track (2544.567mil,1460.898mil)(2589.252mil,1460.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R14-1(1047mil,3522mil) on Top Layer And Track (1016.882mil,3490.898mil)(1061.567mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-1(2574.685mil,1492mil) on Top Layer And Track (2544.567mil,1523.102mil)(2589.252mil,1523.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-1(1047mil,3522mil) on Top Layer And Track (1016.882mil,3553.102mil)(1061.567mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-2(2635.315mil,1492mil) on Top Layer And Track (2620.748mil,1460.898mil)(2665.433mil,1460.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-2(1107.63mil,3522mil) on Top Layer And Track (1093.063mil,3490.898mil)(1137.748mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-2(2635.315mil,1492mil) on Top Layer And Track (2620.748mil,1523.102mil)(2665.433mil,1523.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-2(1107.63mil,3522mil) on Top Layer And Track (1093.063mil,3553.102mil)(1137.748mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-2(2635.315mil,1492mil) on Top Layer And Track (2665.433mil,1460.898mil)(2665.433mil,1523.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R14-2(1107.63mil,3522mil) on Top Layer And Track (1137.748mil,3490.898mil)(1137.748mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-1(2062.315mil,2815mil) on Top Layer And Track (2047.748mil,2783.898mil)(2092.433mil,2783.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-1(2062.315mil,2815mil) on Top Layer And Track (2047.748mil,2783.898mil)(2092.433mil,2783.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-1(2062.315mil,2815mil) on Top Layer And Track (2047.748mil,2846.102mil)(2092.433mil,2846.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-1(2062.315mil,2815mil) on Top Layer And Track (2047.748mil,2846.102mil)(2092.433mil,2846.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-1(2062.315mil,2815mil) on Top Layer And Track (2092.433mil,2783.898mil)(2092.433mil,2846.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-1(2062.315mil,2815mil) on Top Layer And Track (2092.433mil,2783.898mil)(2092.433mil,2846.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-2(2001.685mil,2815mil) on Top Layer And Track (1971.567mil,2783.898mil)(1971.567mil,2846.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-2(2001.685mil,2815mil) on Top Layer And Track (1971.567mil,2783.898mil)(1971.567mil,2846.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R2-2(2001.685mil,2815mil) on Top Layer And Track (1971.567mil,2783.898mil)(2016.252mil,2783.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R2-2(2001.685mil,2815mil) on Top Layer And Track (1971.567mil,2783.898mil)(2016.252mil,2783.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-2(2001.685mil,2815mil) on Top Layer And Track (1971.567mil,2846.102mil)(2016.252mil,2846.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R2-2(2001.685mil,2815mil) on Top Layer And Track (1971.567mil,2846.102mil)(2016.252mil,2846.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-1(2209.685mil,2822mil) on Top Layer And Track (2179.567mil,2790.898mil)(2179.567mil,2853.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-1(2209.685mil,2822mil) on Top Layer And Track (2179.567mil,2790.898mil)(2179.567mil,2853.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R3-1(2209.685mil,2822mil) on Top Layer And Track (2179.567mil,2790.898mil)(2224.252mil,2790.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R3-1(2209.685mil,2822mil) on Top Layer And Track (2179.567mil,2790.898mil)(2224.252mil,2790.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-1(2209.685mil,2822mil) on Top Layer And Track (2179.567mil,2853.102mil)(2224.252mil,2853.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-1(2209.685mil,2822mil) on Top Layer And Track (2179.567mil,2853.102mil)(2224.252mil,2853.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-2(2270.315mil,2822mil) on Top Layer And Track (2255.748mil,2790.898mil)(2300.433mil,2790.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-2(2270.315mil,2822mil) on Top Layer And Track (2255.748mil,2790.898mil)(2300.433mil,2790.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-2(2270.315mil,2822mil) on Top Layer And Track (2255.748mil,2853.102mil)(2300.433mil,2853.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-2(2270.315mil,2822mil) on Top Layer And Track (2255.748mil,2853.102mil)(2300.433mil,2853.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-2(2270.315mil,2822mil) on Top Layer And Track (2300.433mil,2790.898mil)(2300.433mil,2853.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R3-2(2270.315mil,2822mil) on Top Layer And Track (2300.433mil,2790.898mil)(2300.433mil,2853.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-1(1494mil,3417.315mil) on Top Layer And Track (1462.898mil,3402.748mil)(1462.898mil,3447.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-1(1494mil,3417.315mil) on Top Layer And Track (1462.898mil,3402.748mil)(1462.898mil,3447.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-1(1494mil,3417.315mil) on Top Layer And Track (1462.898mil,3447.433mil)(1525.102mil,3447.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-1(1494mil,3417.315mil) on Top Layer And Track (1462.898mil,3447.433mil)(1525.102mil,3447.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-1(1494mil,3417.315mil) on Top Layer And Track (1525.102mil,3402.748mil)(1525.102mil,3447.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-1(1494mil,3417.315mil) on Top Layer And Track (1525.102mil,3402.748mil)(1525.102mil,3447.433mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R4-2(1494mil,3356.685mil) on Top Layer And Track (1462.898mil,3326.567mil)(1462.898mil,3371.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R4-2(1494mil,3356.685mil) on Top Layer And Track (1462.898mil,3326.567mil)(1462.898mil,3371.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-2(1494mil,3356.685mil) on Top Layer And Track (1462.898mil,3326.567mil)(1525.102mil,3326.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-2(1494mil,3356.685mil) on Top Layer And Track (1462.898mil,3326.567mil)(1525.102mil,3326.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-2(1494mil,3356.685mil) on Top Layer And Track (1525.102mil,3326.567mil)(1525.102mil,3371.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R4-2(1494mil,3356.685mil) on Top Layer And Track (1525.102mil,3326.567mil)(1525.102mil,3371.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-1(2748.685mil,2232mil) on Top Layer And Track (2718.567mil,2200.898mil)(2718.567mil,2263.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-1(2748.685mil,2232mil) on Top Layer And Track (2718.567mil,2200.898mil)(2718.567mil,2263.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R5-1(2748.685mil,2232mil) on Top Layer And Track (2718.567mil,2200.898mil)(2763.252mil,2200.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R5-1(2748.685mil,2232mil) on Top Layer And Track (2718.567mil,2200.898mil)(2763.252mil,2200.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-1(2748.685mil,2232mil) on Top Layer And Track (2718.567mil,2263.102mil)(2763.252mil,2263.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-1(2748.685mil,2232mil) on Top Layer And Track (2718.567mil,2263.102mil)(2763.252mil,2263.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-2(2809.315mil,2232mil) on Top Layer And Track (2794.748mil,2200.898mil)(2839.433mil,2200.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-2(2809.315mil,2232mil) on Top Layer And Track (2794.748mil,2200.898mil)(2839.433mil,2200.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-2(2809.315mil,2232mil) on Top Layer And Track (2794.748mil,2263.102mil)(2839.433mil,2263.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-2(2809.315mil,2232mil) on Top Layer And Track (2794.748mil,2263.102mil)(2839.433mil,2263.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-2(2809.315mil,2232mil) on Top Layer And Track (2839.433mil,2200.898mil)(2839.433mil,2263.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R5-2(2809.315mil,2232mil) on Top Layer And Track (2839.433mil,2200.898mil)(2839.433mil,2263.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-1(1047mil,3522mil) on Top Layer And Track (1016.882mil,3490.898mil)(1016.882mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-1(2063.315mil,2660.333mil) on Top Layer And Track (2048.748mil,2629.231mil)(2093.433mil,2629.231mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R6-1(1047mil,3522mil) on Top Layer And Track (1016.882mil,3490.898mil)(1061.567mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-1(2063.315mil,2660.333mil) on Top Layer And Track (2048.748mil,2691.436mil)(2093.433mil,2691.436mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-1(1047mil,3522mil) on Top Layer And Track (1016.882mil,3553.102mil)(1061.567mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-1(2063.315mil,2660.333mil) on Top Layer And Track (2093.433mil,2629.231mil)(2093.433mil,2691.436mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-2(1107.63mil,3522mil) on Top Layer And Track (1093.063mil,3490.898mil)(1137.748mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-2(2002.685mil,2660.333mil) on Top Layer And Track (1972.567mil,2629.231mil)(1972.567mil,2691.436mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-2(1107.63mil,3522mil) on Top Layer And Track (1093.063mil,3553.102mil)(1137.748mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R6-2(2002.685mil,2660.333mil) on Top Layer And Track (1972.567mil,2629.231mil)(2017.252mil,2629.231mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-2(1107.63mil,3522mil) on Top Layer And Track (1137.748mil,3490.898mil)(1137.748mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R6-2(2002.685mil,2660.333mil) on Top Layer And Track (1972.567mil,2691.436mil)(2017.252mil,2691.436mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-1(2063.315mil,2660.333mil) on Top Layer And Track (2048.748mil,2629.231mil)(2093.433mil,2629.231mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-1(939.297mil,3522mil) on Top Layer And Track (924.73mil,3490.898mil)(969.415mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-1(2063.315mil,2660.333mil) on Top Layer And Track (2048.748mil,2691.436mil)(2093.433mil,2691.436mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-1(939.297mil,3522mil) on Top Layer And Track (924.73mil,3553.102mil)(969.415mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-1(2063.315mil,2660.333mil) on Top Layer And Track (2093.433mil,2629.231mil)(2093.433mil,2691.436mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-1(939.297mil,3522mil) on Top Layer And Track (969.415mil,3490.898mil)(969.415mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-2(2002.685mil,2660.333mil) on Top Layer And Track (1972.567mil,2629.231mil)(1972.567mil,2691.436mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-2(878.667mil,3522mil) on Top Layer And Track (848.549mil,3490.898mil)(848.549mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R7-2(2002.685mil,2660.333mil) on Top Layer And Track (1972.567mil,2629.231mil)(2017.252mil,2629.231mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R7-2(878.667mil,3522mil) on Top Layer And Track (848.549mil,3490.898mil)(893.234mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-2(2002.685mil,2660.333mil) on Top Layer And Track (1972.567mil,2691.436mil)(2017.252mil,2691.436mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R7-2(878.667mil,3522mil) on Top Layer And Track (848.549mil,3553.102mil)(893.234mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-1(939.297mil,3522mil) on Top Layer And Track (924.73mil,3490.898mil)(969.415mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-1(1040mil,748.63mil) on Top Layer And Track (1008.898mil,734.063mil)(1008.898mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-1(939.297mil,3522mil) on Top Layer And Track (924.73mil,3553.102mil)(969.415mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-1(1040mil,748.63mil) on Top Layer And Track (1008.898mil,778.748mil)(1071.102mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-1(939.297mil,3522mil) on Top Layer And Track (969.415mil,3490.898mil)(969.415mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-1(1040mil,748.63mil) on Top Layer And Track (1071.102mil,734.063mil)(1071.102mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-2(878.667mil,3522mil) on Top Layer And Track (848.549mil,3490.898mil)(848.549mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R8-2(1040mil,688mil) on Top Layer And Track (1008.898mil,657.882mil)(1008.898mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R8-2(878.667mil,3522mil) on Top Layer And Track (848.549mil,3490.898mil)(893.234mil,3490.898mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-2(1040mil,688mil) on Top Layer And Track (1008.898mil,657.882mil)(1071.102mil,657.882mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-2(878.667mil,3522mil) on Top Layer And Track (848.549mil,3553.102mil)(893.234mil,3553.102mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R8-2(1040mil,688mil) on Top Layer And Track (1071.102mil,657.882mil)(1071.102mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-1(1040mil,748.63mil) on Top Layer And Track (1008.898mil,734.063mil)(1008.898mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-1(963.667mil,748.63mil) on Top Layer And Track (932.564mil,734.063mil)(932.564mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-1(1040mil,748.63mil) on Top Layer And Track (1008.898mil,778.748mil)(1071.102mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-1(963.667mil,748.63mil) on Top Layer And Track (932.564mil,778.748mil)(994.769mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-1(1040mil,748.63mil) on Top Layer And Track (1071.102mil,734.063mil)(1071.102mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-1(963.667mil,748.63mil) on Top Layer And Track (994.769mil,734.063mil)(994.769mil,778.748mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R9-2(1040mil,688mil) on Top Layer And Track (1008.898mil,657.882mil)(1008.898mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
-Silk To Solder Mask Clearance Constraint: (8.452mil < 10mil) Between Pad R9-2(963.667mil,688mil) on Top Layer And Track (932.564mil,657.882mil)(932.564mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.452mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-2(1040mil,688mil) on Top Layer And Track (1008.898mil,657.882mil)(1071.102mil,657.882mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-2(963.667mil,688mil) on Top Layer And Track (932.564mil,657.882mil)(994.769mil,657.882mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-2(1040mil,688mil) on Top Layer And Track (1071.102mil,657.882mil)(1071.102mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
-Silk To Solder Mask Clearance Constraint: (7.874mil < 10mil) Between Pad R9-2(963.667mil,688mil) on Top Layer And Track (994.769mil,657.882mil)(994.769mil,702.567mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.874mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U2-(1247.448mil,3407.22mil) on Top Layer And Text "C6" (1228mil,3467mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U2-(1247.448mil,3407.22mil) on Top Layer And Text "C21" (1228mil,3467mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U2-3(1338mil,3171mil) on Top Layer And Text "C5" (1339mil,3202mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U2-3(1338mil,3171mil) on Top Layer And Text "C5" (1339mil,3202mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-1(1821.236mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-1(1821.236mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-10(1348.795mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-10(1348.795mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-11(1427.535mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-11(1427.535mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-12(1506.276mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-12(1506.276mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-13(1585.016mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-13(1585.016mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-14(1663.756mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-14(1663.756mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-15(1742.496mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-15(1742.496mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-16(1821mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-16(1821mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-2(1742mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-2(1742mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-3(1663.756mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-3(1663.756mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-4(1585.016mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-4(1585.016mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-5(1506.276mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-5(1506.276mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-6(1427.535mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-6(1427.535mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-7(1348.795mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-7(1348.795mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-8(1270.055mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-8(1270.055mil,129.701mil) on Bottom Layer And Track (1211mil,117.89mil)(1880.291mil,117.89mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-9(1270.055mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U3-9(1270.055mil,736mil) on Bottom Layer And Track (1211mil,747.811mil)(1880.291mil,747.811mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-1(2816.661mil,555.74mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-1(2816.661mil,555.74mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-10(2816.661mil,1087.236mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-10(2816.661mil,1087.236mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-11(2816.661mil,1146.291mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-11(2816.661mil,1146.291mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-12(2816.661mil,1205.347mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-12(2816.661mil,1205.347mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-13(2816.661mil,1264.402mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-13(2816.661mil,1264.402mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-14(2009.161mil,1264.402mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-14(2009.161mil,1264.402mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-15(2009.161mil,1205.347mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-15(2009.161mil,1205.347mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-16(2009.161mil,1146.291mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-16(2009.161mil,1146.291mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-17(2009.161mil,1087.236mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-17(2009.161mil,1087.236mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-18(2009.161mil,1028.181mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-18(2009.161mil,1028.181mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-19(2009.161mil,969.126mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-19(2009.161mil,969.126mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-2(2816.661mil,614.795mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-2(2816.661mil,614.795mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-20(2009.161mil,910.071mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-20(2009.161mil,910.071mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-21(2009.161mil,851.016mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-21(2009.161mil,851.016mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-22(2009.161mil,791.961mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-22(2009.161mil,791.961mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-23(2009.161mil,732.905mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-23(2009.161mil,732.905mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-24(2009.161mil,673.85mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-24(2009.161mil,673.85mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-25(2009.161mil,614.795mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-25(2009.161mil,614.795mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-26(2009.161mil,555.74mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-26(2009.161mil,555.74mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (7.598mil < 10mil) Between Pad U4-27(2039.89mil,327mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.598mil]
|
-Silk To Solder Mask Clearance Constraint: (7.598mil < 10mil) Between Pad U4-27(2039.89mil,327mil) on Top Layer And Track (2009.575mil,327mil)(2009.575mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.598mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-27(2039.89mil,327mil) on Top Layer And Track (2009.575mil,327mil)(2816.661mil,327mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-27(2039.89mil,327mil) on Top Layer And Track (2009.575mil,327mil)(2816.661mil,327mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-28(2098.945mil,327mil) on Top Layer And Track (2009.575mil,327mil)(2816.661mil,327mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-28(2098.945mil,327mil) on Top Layer And Track (2009.575mil,327mil)(2816.661mil,327mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-29(2158mil,327mil) on Top Layer And Track (2009.575mil,327mil)(2816.661mil,327mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-29(2158mil,327mil) on Top Layer And Track (2009.575mil,327mil)(2816.661mil,327mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-3(2816.661mil,673.85mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-3(2816.661mil,673.85mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-4(2816.661mil,732.905mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-4(2816.661mil,732.905mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-5(2816.661mil,791.961mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-5(2816.661mil,791.961mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-6(2816.661mil,851.016mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-6(2816.661mil,851.016mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-7(2816.661mil,910.071mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-7(2816.661mil,910.071mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-8(2816.661mil,969.126mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-8(2816.661mil,969.126mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-9(2816.661mil,1028.181mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
-Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U4-9(2816.661mil,1028.181mil) on Top Layer And Track (2816.661mil,327mil)(2816.661mil,1311.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
|
+Silk To Solder Mask Clearance Constraint: (8.795mil < 10mil) Between Pad Y1-1(2462.504mil,2649.307mil) on Top Layer And Track (2427.071mil,2523.323mil)(2427.071mil,2688.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.795mil]
|
-Silk To Solder Mask Clearance Constraint: (5.349mil < 10mil) Between Pad Y1-1(2466.008mil,2631mil) on Top Layer And Track (2433.102mil,2574.307mil)(2433.102mil,2603.244mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.349mil]
|
+Silk To Solder Mask Clearance Constraint: (7.811mil < 10mil) Between Pad Y1-1(2462.504mil,2649.307mil) on Top Layer And Track (2427.071mil,2688.677mil)(2560.929mil,2688.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.811mil]
|
-Silk To Solder Mask Clearance Constraint: (5.347mil < 10mil) Between Pad Y1-1(2466.008mil,2631mil) on Top Layer And Track (2433.102mil,2634.74mil)(2433.102mil,2663.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.347mil]
|
+Silk To Solder Mask Clearance Constraint: (8.795mil < 10mil) Between Pad Y1-2(2462.504mil,2562.693mil) on Top Layer And Track (2427.071mil,2523.323mil)(2427.071mil,2688.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.795mil]
|
-Silk To Solder Mask Clearance Constraint: (5.473mil < 10mil) Between Pad Y1-1(2466.008mil,2631mil) on Top Layer And Track (2449mil,2581mil)(2449mil,2596mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.473mil]
|
+Silk To Solder Mask Clearance Constraint: (7.811mil < 10mil) Between Pad Y1-2(2462.504mil,2562.693mil) on Top Layer And Track (2427.071mil,2523.323mil)(2560.929mil,2523.323mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.811mil]
|
-Silk To Solder Mask Clearance Constraint: (5.642mil < 10mil) Between Pad Y1-2(2466.008mil,2544.386mil) on Top Layer And Track (2433.102mil,2574.307mil)(2433.102mil,2603.244mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.642mil]
|
+Silk To Solder Mask Clearance Constraint: (7.811mil < 10mil) Between Pad Y1-3(2525.496mil,2562.693mil) on Top Layer And Track (2427.071mil,2523.323mil)(2560.929mil,2523.323mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.811mil]
|
-Silk To Solder Mask Clearance Constraint: (7.087mil < 10mil) Between Pad Y1-2(2466.008mil,2544.386mil) on Top Layer And Track (2449mil,2581mil)(2449mil,2596mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.087mil]
|
+Silk To Solder Mask Clearance Constraint: (8.795mil < 10mil) Between Pad Y1-3(2525.496mil,2562.693mil) on Top Layer And Track (2560.929mil,2523.323mil)(2560.929mil,2688.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.795mil]
|
+
+
+Silk To Solder Mask Clearance Constraint: (7.811mil < 10mil) Between Pad Y1-4(2525.496mil,2649.307mil) on Top Layer And Track (2427.071mil,2688.677mil)(2560.929mil,2688.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.811mil]
|
+
+
+Silk To Solder Mask Clearance Constraint: (8.795mil < 10mil) Between Pad Y1-4(2525.496mil,2649.307mil) on Top Layer And Track (2560.929mil,2523.323mil)(2560.929mil,2688.677mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.795mil]
|
+
+