/**
  ******************************************************************************
  * @file           : usart.dma.c
	* @author  				: zsq
	* @version 				: V1.0
	* @date    				: 2019-06-27
  * @brief          : usart dma config
  ******************************************************************************
    * @attention
  *
  * Copyright (c) 2019 YUNHORN(Shenzhen YunHorn Technology Co., Ltd
  * All rights reserved.
  *
  ******************************************************************************
  */

#include "usart_dma.h"
#include "stm32f0xx.h"

extern uint8_t NH3_Buffer[NH3_BUF_LEN];
extern uint8_t CH2O_Buffer[CH2O_BUF_LEN];
extern uint8_t PM25_Buffer[PM25_BUF_LEN];
extern uint8_t H2S_Buffer[H2S_BUF_LEN];
extern uint8_t CO2_Buffer[CO2_BUF_LEN];
extern uint8_t WIFI_Buffer[WIFI_BUF_LEN];

//lorawan rec_buf
extern uint8_t loraNode_Buffer[LoraNode_BUF_LEN];

static void Usart_DMA_Config(DMA_Channel_TypeDef* DMAy_Channelx,uint32_t RCC_AHBPeriph,
										USART_TypeDef* USARTx,uint8_t* Data_Buffer,uint32_t Data_Length,
										DMA_TypeDef* DMAy, uint32_t DMAx_CHy_RemapRequest)
{
	RCC_AHBPeriphClockCmd(RCC_AHBPeriph, ENABLE);
	
	DMA_InitTypeDef DMA_InitStructure;
	
  DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USARTx->RDR;
  DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)Data_Buffer;
  DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
  DMA_InitStructure.DMA_BufferSize = Data_Length;
  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
  DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
  DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
  DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
  DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
  DMA_Init(DMAy_Channelx, &DMA_InitStructure);
	
	DMA_Cmd(DMAy_Channelx, ENABLE);
	DMA_RemapConfig(DMAy,DMAx_CHy_RemapRequest);
	
	USART_ITConfig(USARTx,USART_IT_IDLE,ENABLE);
	USART_DMACmd(USARTx,USART_DMAReq_Rx,ENABLE);
}

void USARTx_DMA_CONFIG(void)
{
//	Usart_DMA_Config(DMA1_Channel6,RCC_AHBPeriph_DMA1,USART2,NH3_Buffer,64,DMA1,DMA1_CH6_USART2_RX);
	
	//NH3 DMA����
	Usart_DMA_Config(NH3_USART_DMA_CHANNEL,NH3_USART_DMA_CLK,NH3_USART,NH3_Buffer,NH3_BUF_LEN,NH3_USART_DMA,NH3_USART_DMA_RemapRequest);
	
	//CH2O DMA����
	Usart_DMA_Config(CH2O_USART_DMA_CHANNEL,CH2O_USART_DMA_CLK,CH2O_USART,CH2O_Buffer,CH2O_BUF_LEN,CH2O_USART_DMA,CH2O_USART_DMA_RemapRequest);
	
	//PM25 DMA����
	Usart_DMA_Config(PM25_USART_DMA_CHANNEL,PM25_USART_DMA_CLK,PM25_USART,PM25_Buffer,PM25_BUF_LEN,PM25_USART_DMA,PM25_USART_DMA_RemapRequest);

	//H2S DMA����
	Usart_DMA_Config(H2S_USART_DMA_CHANNEL,H2S_USART_DMA_CLK,H2S_USART,H2S_Buffer,H2S_BUF_LEN,H2S_USART_DMA,H2S_USART_DMA_RemapRequest);
	
	//����CO2 DMA
//	Usart_DMA_Config(DMA1_Channel6,RCC_AHBPeriph_DMA1,USART6,CO2_Buffer,64,DMA1,DMA1_CH6_USART6_RX);
//	Usart_DMA_Config(DMA2_Channel3,RCC_AHBPeriph_DMA2,USART6,CO2_Buffer,64,DMA2,DMA2_CH3_USART6_RX);
	
	//LORA DMA����
	Usart_DMA_Config(LORA_USART_DMA_CHANNEL,LORA_USART_DMA_CLK,LORA_USART,loraNode_Buffer,LoraNode_BUF_LEN,LORA_USART_DMA,LORA_USART_DMA_RemapRequest);
}