84 lines
3.1 KiB
C
84 lines
3.1 KiB
C
/**
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******************************************************************************
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* @file : usart.dma.c
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* @author : zsq
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* @version : V1.0
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* @date : 2019-06-27
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* @brief : usart dma config
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019 YUNHORN(Shenzhen YunHorn Technology Co., Ltd
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* All rights reserved.
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*
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******************************************************************************
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*/
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#include "usart_dma.h"
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#include "stm32f0xx.h"
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extern uint8_t NH3_Buffer[NH3_BUF_LEN];
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extern uint8_t CH2O_Buffer[CH2O_BUF_LEN];
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extern uint8_t PM25_Buffer[PM25_BUF_LEN];
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extern uint8_t H2S_Buffer[H2S_BUF_LEN];
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extern uint8_t CO2_Buffer[CO2_BUF_LEN];
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extern uint8_t WIFI_Buffer[WIFI_BUF_LEN];
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//lorawan rec_buf
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extern uint8_t loraNode_Buffer[LoraNode_BUF_LEN];
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static void Usart_DMA_Config(DMA_Channel_TypeDef* DMAy_Channelx,uint32_t RCC_AHBPeriph,
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USART_TypeDef* USARTx,uint8_t* Data_Buffer,uint32_t Data_Length,
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DMA_TypeDef* DMAy, uint32_t DMAx_CHy_RemapRequest)
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{
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph, ENABLE);
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DMA_InitTypeDef DMA_InitStructure;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USARTx->RDR;
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DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)Data_Buffer;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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DMA_InitStructure.DMA_BufferSize = Data_Length;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMAy_Channelx, &DMA_InitStructure);
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DMA_Cmd(DMAy_Channelx, ENABLE);
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DMA_RemapConfig(DMAy,DMAx_CHy_RemapRequest);
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USART_ITConfig(USARTx,USART_IT_IDLE,ENABLE);
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USART_DMACmd(USARTx,USART_DMAReq_Rx,ENABLE);
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}
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void USARTx_DMA_CONFIG(void)
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{
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// Usart_DMA_Config(DMA1_Channel6,RCC_AHBPeriph_DMA1,USART2,NH3_Buffer,64,DMA1,DMA1_CH6_USART2_RX);
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//NH3 DMA<4D><41><EFBFBD><EFBFBD>
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Usart_DMA_Config(NH3_USART_DMA_CHANNEL,NH3_USART_DMA_CLK,NH3_USART,NH3_Buffer,NH3_BUF_LEN,NH3_USART_DMA,NH3_USART_DMA_RemapRequest);
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//CH2O DMA<4D><41><EFBFBD><EFBFBD>
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Usart_DMA_Config(CH2O_USART_DMA_CHANNEL,CH2O_USART_DMA_CLK,CH2O_USART,CH2O_Buffer,CH2O_BUF_LEN,CH2O_USART_DMA,CH2O_USART_DMA_RemapRequest);
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//PM25 DMA<4D><41><EFBFBD><EFBFBD>
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Usart_DMA_Config(PM25_USART_DMA_CHANNEL,PM25_USART_DMA_CLK,PM25_USART,PM25_Buffer,PM25_BUF_LEN,PM25_USART_DMA,PM25_USART_DMA_RemapRequest);
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//H2S DMA<4D><41><EFBFBD><EFBFBD>
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Usart_DMA_Config(H2S_USART_DMA_CHANNEL,H2S_USART_DMA_CLK,H2S_USART,H2S_Buffer,H2S_BUF_LEN,H2S_USART_DMA,H2S_USART_DMA_RemapRequest);
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CO2 DMA
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// Usart_DMA_Config(DMA1_Channel6,RCC_AHBPeriph_DMA1,USART6,CO2_Buffer,64,DMA1,DMA1_CH6_USART6_RX);
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// Usart_DMA_Config(DMA2_Channel3,RCC_AHBPeriph_DMA2,USART6,CO2_Buffer,64,DMA2,DMA2_CH3_USART6_RX);
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//LORA DMA<4D><41><EFBFBD><EFBFBD>
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Usart_DMA_Config(LORA_USART_DMA_CHANNEL,LORA_USART_DMA_CLK,LORA_USART,loraNode_Buffer,LoraNode_BUF_LEN,LORA_USART_DMA,LORA_USART_DMA_RemapRequest);
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}
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