61 lines
2.8 KiB
Plaintext
61 lines
2.8 KiB
Plaintext
/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08000000;
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/*-Memory Regions-*/
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/***** FLASH *****/
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define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x0803EFFF;
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define symbol __ICFEDIT_region_User_Keys_region_ROM_start__ = 0x0803E500;
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define symbol __ICFEDIT_region_User_Keys_region_ROM_end__ = 0x0803E7FF;
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/***** NVM FLASH Data *****/
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/* WARNING: Symbols not used. The NVMS address is defined in lora_app.c */
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define symbol __ICFEDIT_region_LW_NVM_ROM_start__ = 0x0803F000;
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define symbol __ICFEDIT_region_LW_NWM_ROM_end__ = 0x0803FFFF;
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/***** Non-backup SRAM1 *****/
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
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/***** NVM RAM Data *****/
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define symbol __ICFEDIT_region_LW_NVM_RAM_start__ = 0x20008000;
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define symbol __ICFEDIT_region_LW_NWM_RAM_end__ = 0x20008FFF;
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/***** Backup SRAM2 *****/
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define symbol __ICFEDIT_region_RAM2_start__ = 0x20009000;
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define symbol __ICFEDIT_region_RAM2_end__ = 0x2000FFFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x800;
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define symbol __ICFEDIT_size_heap__ = 0x200;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region USER_KEYS_ROM_region = mem:[from __ICFEDIT_region_User_Keys_region_ROM_start__ to __ICFEDIT_region_User_Keys_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define region LW_NVM_RAM_region = mem:[from __ICFEDIT_region_LW_NVM_RAM_start__ to __ICFEDIT_region_LW_NWM_RAM_end__];
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define region RAM2_region = mem:[from __ICFEDIT_region_RAM2_start__ to __ICFEDIT_region_RAM2_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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/* to make sure the binary size is a multiple of the AES block size (16 bytes) */
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define root section aes_block_padding with alignment=16
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{
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udata8 "Force Alignment";
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pad_to 16;
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};
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in USER_KEYS_ROM_region { section .USER_embedded_Keys, last section aes_block_padding };
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place in RAM_region { readwrite,
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block CSTACK, block HEAP };
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place in LW_NVM_RAM_region { first section .LW_NVM_RAM };
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place in LW_NVM_RAM_region { section .LW_NVM_BACKUP_RAM };
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place in RAM2_region { };
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