Altium

Design Rule Verification Report

Date:		2021/8/11
Time:		18:20:30
Elapsed Time:		00:00:00
Filename:		E:\yunhorn\Project\PeopleCount(VL53L1A2)\PeopleCount(VL53L1A2)PCB_Project\PeopleCount(VL53L1A2).PcbDoc

Warnings:		0
Rule Violations:		0

Summary

Warnings	Count
Total	0

Rule Violations	Count
Clearance Constraint (Gap=10mil) (All),(All)	0
Short-Circuit Constraint (Allowed=No) (All),(All)	0
Un-Routed Net Constraint ( (All) )	0
Modified Polygon (Allow modified: No), (Allow shelved: No)	0
Width Constraint (Min=10mil) (Max=10mil) (Preferred=10mil) (All)	0
Width Constraint (Min=10mil) (Max=30mil) (Preferred=25mil) (InNet('NetC15_2'))	0
Width Constraint (Min=10mil) (Max=20mil) (Preferred=10mil) (InNet('3V3'))	0
Width Constraint (Min=10mil) (Max=40mil) (Preferred=36mil) (InNet('RF_OUT'))	0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)	0
Hole Size Constraint (Min=1mil) (Max=150mil) (All)	0
Hole To Hole Clearance (Gap=10mil) (All),(All)	0
Minimum Solder Mask Sliver (Gap=0mil) (All),(All)	0
Silk To Solder Mask (Clearance=0mil) (IsPad),(All)	0
Silk to Silk (Clearance=0mil) (All),(All)	0
Net Antennae (Tolerance=0mil) (All)	0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)	0
Total	0