---update sts cfg nvm

This commit is contained in:
Yunhorn 2024-09-24 12:57:27 +08:00
parent e408229c54
commit 00fb0e1df3
6 changed files with 75 additions and 37 deletions

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@ -47,12 +47,12 @@ extern "C" {
/**
* @brief Verbose level for all trace logs
*/
#define VERBOSE_LEVEL VLEVEL_OFF
#define VERBOSE_LEVEL VLEVEL_M
/**
* @brief Enable trace logs
*/
#define APP_LOG_ENABLED 0
#define APP_LOG_ENABLED 1
/**
* @brief Activate monitoring (probes) of some internal RF signals for debug purpose
@ -75,13 +75,13 @@ extern "C" {
* @brief Enable/Disable MCU Debugger pins (dbg serial wires)
* @note by HW serial wires are ON by default, need to put them OFF to save power
*/
#define DEBUGGER_ENABLED 0
#define DEBUGGER_ENABLED 1
/**
* @brief Disable Low Power mode
* @note 0: LowPowerMode enabled. MCU enters stop2 mode, 1: LowPowerMode disabled. MCU enters sleep mode only
*/
#define LOW_POWER_DISABLE 0
#define LOW_POWER_DISABLE 1
/* USER CODE BEGIN EC */

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@ -112,7 +112,7 @@
#define YUNHORN_STS_AC_CODE_SIZE 20U
#define STS_NVM_CFG_SIZE 32U
#define STS_CFG_PCFG_SIZE 28U
#define STS_CFG_PCFG_SIZE 20U
#define STS_CFG_CMD_SIZE 30U
#define STS_CFG_CMD_SHORT_LEN 8U
#define STS_MODE_COLOR_CMD_LEN 5U

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@ -485,29 +485,55 @@ typedef struct
// 0 --- 10 11 12 -- 39 40 41 42 43 44-63
// LEN P RSS FALL_DETECTION AC_CODE
enum nvm_order {
NVM_MTM1=0,
NVM_MTM2,
NVM_VER,
NVM_HWV,
NVM_PERIODICITY,
NVM_UNIT,
NVM_SAMPLING,
NVM_S_UNIT,
NVM_WORK_MODE,
NVM_SERVICE_MASK,
NVM_RESERVE01, //10
NVM_MTM1=0, // 0
NVM_MTM2, // 1
NVM_VER, // 2
NVM_HWV, // 3
NVM_PERIODICITY, // 4
NVM_UNIT, // 5
NVM_SAMPLING, // 6
NVM_S_UNIT, // 7
NVM_WORK_MODE, // 8
NVM_SERVICE_MASK, // 9
NVM_IOC_MASK, //10
NVM_LEN, //11, 32=0x20
NVM_CFG_START, //12, p[0] bytes for configs,
NVM_CFG_START=12, //12, p[0] bytes for configs,
//13, p[1]
//14, p[2]
// ...
//39, P[27]
NVM_FALL_DETECTION_ACC_THRESHOLD=40, //40
NVM_FALL_DETECTION_DEPTH_THRESHOLD, //41
NVM_FALL_DETECTION_RESERVE, //42
NVM_OCCUPANCY_OVERTIME_THRESHOLD, //43
NVM_AC_CODE_START=44 //STORED, NO UPLOAD
//63, 20 bytes for AC code
//15, p[3]
//16, p[4]
//17, p[5]
//18, p[6]
//19, p[7]
//20, p[8]
//21, p[9]
//22, p[10]
//23, p[11]
//24, p[12]
//25, p[13]
//26, p[14]
//27, p[15]
//28, p[16]
//29, p[17]
//30, p[18]
NVM_CFG_START_END=31, //31, p[19]
NVM_RESERVE02, //32
NVM_RESERVE03, //33
NVM_SENSOR_INSTALL_HEIGHT, //34
NVM_ALARM_PARAMETER05, //35
NVM_ALARM_MUTE_RESET_TIMER, //36
NVM_ALARM_LAMP_BAR_FLASHING_COLOR, //37
NVM_OCCUPANCY_OVERTIME_THRESHOLD, //38
NVM_MOTIONLESS_DURATION_THRESHOLD, //39
NVM_UNCONSCIOUS_LEVEL_THRESHOLD, //40
NVM_FALL_DETECTION_ACC_THRESHOLD, //41
NVM_FALL_DETECTION_DEPTH_THRESHOLD, //42
NVM_FALL_CONFIRM_THRESHOLD, //43
NVM_AC_CODE_START=44 //STORED, NO UPLOAD
//63, 20 bytes for AC code
};
typedef struct sts_cfg_nvm {
@ -524,10 +550,22 @@ typedef struct sts_cfg_nvm {
uint8_t reseve01;
uint8_t length; // length of following parameters except AC CODE(20bytes)
uint8_t p[STS_CFG_PCFG_SIZE];
uint8_t fall_detection_acc_threshold; // 0 - 9: 0:disable: 1-9 accelaration mg/s2
uint8_t reserve02;
uint8_t reserve03;
uint8_t sensor_install_height_in_10cm;
uint8_t alarm_parameter05;
uint8_t alarm_mute_reset_timer_in_10sec; //60(0x3C) sec alarm_mute_or_reset_expire_timer_in_sec
uint8_t alarm_lamp_bar_flashing_color; //Lamp Bar Flashing color define, 0x20, 2==STS_RED, 0 = STS_DARK, 0x23, 2=STS_RED, 3=STS_BLUE
uint8_t occupancy_overtime_threshold_in_10min; // 0 - 9 0disable, 1-9 occupy over time threshold * 10 min
uint8_t motionless_duration_threshold_in_min; // 10(0x0A) min (2 min.) motionless_duration_threshold_in_min
uint8_t unconscious_or_motionless_level_threshold; // 0 - 9 motion level *128
uint8_t fall_detection_acc_threshold; // 0 - 9: 0:disable: 1-9 accelaration mg/s2
uint8_t fall_detection_depth_threshold; // 0 - 9: 0:disable: 1-9 fall down depth * 10 cm
uint8_t fall_detection_reserve;
uint8_t occupancy_overtime_threshold; // 0 - 9 0disable, 1-9 occupy over time threshold * 10 min
uint8_t fall_confirm_threshold_in_10sec; // 0-60(0x3C) Sec, or 3*10(0x03) sec default falldown_confirm_threshold_in_10sec
uint8_t ac[YUNHORN_STS_AC_CODE_SIZE]; // authorization code, 20 bytes MCU UUID coded
} sts_cfg_nvm_t;

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@ -77,7 +77,7 @@ void MX_DMA_Init(void)
HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn);
#endif
#if 0
#if 1
/* DMA1_Channel7_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 2, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);

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@ -114,7 +114,7 @@ volatile sts_cfg_nvm_t sts_cfg_nvm = {
0x03, //fall detection_depth_threshold *10cm
0x03, //falldown_confirm_threshold_in_10sec, 0x3=30 sec default
// below 20 bytes for RFAC code
{0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0}
{0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0},
};
@ -1582,7 +1582,7 @@ void USER_APP_AUTO_RESPONDER_Parse(char *tlv_buf, size_t tlv_buf_size)
outbuf[i++] = (uint8_t) cfg_in_nvm[NVM_S_UNIT]; //Heart-beat or SAMPLING Periodicity unit
outbuf[i++] = (uint8_t) cfg_in_nvm[NVM_WORK_MODE]; // STS WORK MODE
outbuf[i++] = (uint8_t) cfg_in_nvm[NVM_SERVICE_MASK]; //service mask
outbuf[i++] = (uint8_t) cfg_in_nvm[NVM_RESERVE01]; //service mask
outbuf[i++] = (uint8_t) cfg_in_nvm[NVM_IOC_MASK]; //service mask
outbuf[i++] = (uint8_t) cfg_in_nvm[NVM_LEN]; //length of following cfg value
for (uint8_t j=0; j < cfg_in_nvm[NVM_LEN]; j++) {
@ -1945,8 +1945,8 @@ void OnStoreSTSCFGContextRequest(void)
nvm_store_value[i++] = sts_cfg_nvm.fall_detection_acc_threshold;
nvm_store_value[i++] = sts_cfg_nvm.fall_detection_depth_threshold;
nvm_store_value[i++] = sts_cfg_nvm.fall_detection_reserve;
nvm_store_value[i++] = sts_cfg_nvm.occupancy_overtime_threshold;
nvm_store_value[i++] = sts_cfg_nvm.fall_confirm_threshold_in_10sec;
//nvm_store_value[i++] = sts_cfg_nvm.occupancy_overtime_threshold;
if ((sts_cfg_nvm.ac[0]!=0x0) && (sts_cfg_nvm.ac[19]!=0x0)) {
for (j = 0; j < YUNHORN_STS_AC_CODE_SIZE; j++) {
nvm_store_value[i++] = (sts_cfg_nvm.ac[j]);
@ -2008,7 +2008,7 @@ void STS_REBOOT_CONFIG_Init(void)
sts_cfg_nvm.s_unit = (uint8_t)(nvm_stored_value[NVM_S_UNIT]);
sts_cfg_nvm.work_mode = (uint8_t)(nvm_stored_value[NVM_WORK_MODE]);
sts_cfg_nvm.sts_service_mask = (uint8_t)(nvm_stored_value[NVM_SERVICE_MASK]);
sts_cfg_nvm.reseve01 = (uint8_t)(nvm_stored_value[NVM_RESERVE01]);
sts_cfg_nvm.reseve01 = (uint8_t)(nvm_stored_value[NVM_IOC_MASK]);
sts_cfg_nvm.length = (uint8_t)(nvm_stored_value[NVM_LEN]&0x3F); //MAX 32 bytes
for (uint8_t j=0; j< sts_cfg_nvm.length; j++) {
@ -2017,8 +2017,8 @@ void STS_REBOOT_CONFIG_Init(void)
sts_cfg_nvm.fall_detection_acc_threshold = (uint8_t)nvm_stored_value[NVM_FALL_DETECTION_ACC_THRESHOLD];
sts_cfg_nvm.fall_detection_depth_threshold = (uint8_t)nvm_stored_value[NVM_FALL_DETECTION_DEPTH_THRESHOLD];
sts_cfg_nvm.fall_detection_reserve = (uint8_t)nvm_stored_value[NVM_FALL_DETECTION_RESERVE];
sts_cfg_nvm.occupancy_overtime_threshold = (uint8_t)nvm_stored_value[NVM_OCCUPANCY_OVERTIME_THRESHOLD];
sts_cfg_nvm.fall_confirm_threshold_in_10sec = (uint8_t)nvm_stored_value[NVM_FALL_CONFIRM_THRESHOLD];
//sts_cfg_nvm.occupancy_overtime_threshold = (uint8_t)nvm_stored_value[NVM_OCCUPANCY_OVERTIME_THRESHOLD];
for (uint8_t j=0; j< YUNHORN_STS_AC_CODE_SIZE; j++) {
sts_cfg_nvm.ac[j] = (uint8_t)nvm_stored_value[NVM_AC_CODE_START +j];

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@ -71,7 +71,7 @@ extern "C" {
/*!
* LoRaWAN default class
*/
#define LORAWAN_DEFAULT_CLASS CLASS_A
#define LORAWAN_DEFAULT_CLASS CLASS_C
/*!
* LoRaWAN default confirm state