449 lines
11 KiB
C
449 lines
11 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32wlxx_it.c
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* @author Yunhorn (r) Technology Limited Application Team
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 Yunhorn Technology Limited.
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* Copyright (c) 2023 Shenzhen Yunhorn Technology Co., Ltd.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32wlxx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "app_tof_pin_conf.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern RTC_HandleTypeDef hrtc;
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extern SUBGHZ_HandleTypeDef hsubghz;
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extern UART_HandleTypeDef huart2;
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extern DMA_HandleTypeDef hdma_i2c2_rx;
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extern DMA_HandleTypeDef hdma_i2c2_tx;
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//extern DMA_HandleTypeDef hdma_spi1_rx;
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//extern DMA_HandleTypeDef hdma_spi1_tx;
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//extern SPI_HandleTypeDef hspi1;
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//extern DMA_HandleTypeDef hdma_tim1_up;
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//extern DMA_HandleTypeDef hdma_tim2_up;
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//extern TIM_HandleTypeDef htim1;
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//extern TIM_HandleTypeDef htim2;
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//extern TIM_HandleTypeDef htim16;
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extern DMA_HandleTypeDef hdma_usart2_tx;
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extern DMA_HandleTypeDef hdma_usart2_rx;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles System service call via SWI instruction.
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*/
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void SVC_Handler(void)
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{
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/* USER CODE BEGIN SVCall_IRQn 0 */
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/* USER CODE END SVCall_IRQn 0 */
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/* USER CODE BEGIN SVCall_IRQn 1 */
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/* USER CODE END SVCall_IRQn 1 */
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles Pendable request for system service.
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*/
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void PendSV_Handler(void)
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{
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/* USER CODE BEGIN PendSV_IRQn 0 */
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/* USER CODE END PendSV_IRQn 0 */
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/* USER CODE BEGIN PendSV_IRQn 1 */
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/* USER CODE END PendSV_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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/* USER CODE BEGIN SysTick_IRQn 1 */
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/* USER CODE END SysTick_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32WLxx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32wlxx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles RTC Tamper, RTC TimeStamp, LSECSS and RTC SSRU Interrupts.
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*/
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void TAMP_STAMP_LSECSS_SSRU_IRQHandler(void)
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{
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/* USER CODE BEGIN TAMP_STAMP_LSECSS_SSRU_IRQn 0 */
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/* USER CODE END TAMP_STAMP_LSECSS_SSRU_IRQn 0 */
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HAL_RTCEx_SSRUIRQHandler(&hrtc);
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/* USER CODE BEGIN TAMP_STAMP_LSECSS_SSRU_IRQn 1 */
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/* USER CODE END TAMP_STAMP_LSECSS_SSRU_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI Line 0 Interrupt.
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*/
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void EXTI0_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI0_IRQn 0 */
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/* USER CODE END EXTI0_IRQn 0 */
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//HAL_EXTI_IRQHandler(&H_EXTI_0);
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HAL_GPIO_EXTI_IRQHandler(BUT1_Pin);
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/* USER CODE BEGIN EXTI0_IRQn 1 */
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/* USER CODE END EXTI0_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI Line 1 Interrupt.
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*/
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void EXTI1_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI1_IRQn 0 */
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/* USER CODE END EXTI1_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(BUT2_Pin);
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/* USER CODE BEGIN EXTI1_IRQn 1 */
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/* USER CODE END EXTI1_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 Channel 2 Interrupt.
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*/
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void DMA1_Channel2_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
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/* USER CODE END DMA1_Channel2_IRQn 0 */
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// HAL_DMA_IRQHandler(&hdma_spi1_rx);
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/* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
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/* USER CODE END DMA1_Channel2_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 Channel 3 Interrupt.
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*/
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void DMA1_Channel3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel3_IRQn 0 */
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/* USER CODE END DMA1_Channel3_IRQn 0 */
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//HAL_DMA_IRQHandler(&hdma_spi1_tx);
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/* USER CODE BEGIN DMA1_Channel3_IRQn 1 */
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/* USER CODE END DMA1_Channel3_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 Channel 4 Interrupt.
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*/
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void DMA1_Channel4_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
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/* USER CODE END DMA1_Channel4_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_i2c2_rx);
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/* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
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/* USER CODE END DMA1_Channel4_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 Channel 5 Interrupt.
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*/
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void DMA1_Channel5_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
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/* USER CODE END DMA1_Channel5_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart2_tx);
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/* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
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/* USER CODE END DMA1_Channel5_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 Channel 6 Interrupt.
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*/
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void DMA1_Channel6_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel6_IRQn 0 */
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/* USER CODE END DMA1_Channel6_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart2_rx);
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/* USER CODE BEGIN DMA1_Channel6_IRQn 1 */
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/* USER CODE END DMA1_Channel6_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 Channel 7 Interrupt.
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*/
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void DMA1_Channel7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel7_IRQn 0 */
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/* USER CODE END DMA1_Channel7_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart2_tx);
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/* USER CODE BEGIN DMA1_Channel7_IRQn 1 */
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/* USER CODE END DMA1_Channel7_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI Lines [4] Interrupt.
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*/
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void EXTI4_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI9_5_IRQn 0 */
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/* USER CODE END EXTI9_5_IRQn 0 */
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//HAL_GPIO_EXTI_IRQHandler(TOF_INT_EXTI_PIN);
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/* USER CODE BEGIN EXTI9_5_IRQn 1 */
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/* USER CODE END EXTI9_5_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI Lines [9:5] Interrupt.
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*/
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void EXTI9_5_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI9_5_IRQn 0 */
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/* USER CODE END EXTI9_5_IRQn 0 */
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#if defined(STM32WL55xx)
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HAL_GPIO_EXTI_IRQHandler(BUT3_Pin);
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#endif
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#if defined(STM32WLE5xx)
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//HAL_GPIO_EXTI_IRQHandler(TOF_INT_EXTI_PIN);
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HAL_GPIO_EXTI_IRQHandler(TOF_INT_EXTI_PIN);
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#endif
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/* USER CODE BEGIN EXTI9_5_IRQn 1 */
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/* USER CODE END EXTI9_5_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI Lines [9:5] Interrupt.
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*/
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void EXTI15_10_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI15_10_IRQn 0 */
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/* USER CODE END EXTI15_10_IRQn 0 */
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#if defined(STM32WL55xx)
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HAL_GPIO_EXTI_IRQHandler(TOF_INT_EXTI_PIN);
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#endif
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/* USER CODE BEGIN EXTI15_10_IRQn 1 */
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/* USER CODE END EXTI15_10_IRQn 1 */
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}
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/**
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* @brief This function handles USART2 Interrupt.
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*/
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void USART2_IRQHandler(void)
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{
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/* USER CODE BEGIN USART2_IRQn 0 */
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/* USER CODE END USART2_IRQn 0 */
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HAL_UART_IRQHandler(&huart2);
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/* USER CODE BEGIN USART2_IRQn 1 */
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/* USER CODE END USART2_IRQn 1 */
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}
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/**
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* @brief This function handles RTC Alarms (A and B) Interrupt.
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*/
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void RTC_Alarm_IRQHandler(void)
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{
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/* USER CODE BEGIN RTC_Alarm_IRQn 0 */
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/* USER CODE END RTC_Alarm_IRQn 0 */
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HAL_RTC_AlarmIRQHandler(&hrtc);
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/* USER CODE BEGIN RTC_Alarm_IRQn 1 */
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/* USER CODE END RTC_Alarm_IRQn 1 */
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}
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/**
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* @brief This function handles SUBGHZ Radio Interrupt.
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*/
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void SUBGHZ_Radio_IRQHandler(void)
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{
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/* USER CODE BEGIN SUBGHZ_Radio_IRQn 0 */
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/* USER CODE END SUBGHZ_Radio_IRQn 0 */
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HAL_SUBGHZ_IRQHandler(&hsubghz);
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/* USER CODE BEGIN SUBGHZ_Radio_IRQn 1 */
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/* USER CODE END SUBGHZ_Radio_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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