===== before Weight Scale

.gitignore

@@ -0,0 +1,87 @@
+# ---> C
+# Prerequisites
+*.d
+
+# Object files
+*.o
+*.ko
+*.obj
+*.e1f
+*.axf
+*.de
+*.cyclo
+*.list
+*.mk
+*.settings.xml
+*.mk
+# Linker output
+*.ilk
+*.map
+*.exp
+*.list
+*.su
+
+# Precompiled Headers
+*.gch
+*.pch
+
+# Libraries
+*.lib
+*.a
+*.la
+*.lo
+
+# Shared objects (inc. Windows DLLs)
+*.dll
+*.so
+*.so.*
+*.dylib
+
+
+# Executables
+*.exe
+*.out
+*.app
+*.i*86
+*.x86_64
+*.dep
+*.d
+*.o
+*.dp
+*.lst
+*.elf
+*.build_log
+*.build_log.htm
+
+
+# Debug files
+*.dSYM/
+*.su
+*.idb
+*.pdb
+*.dbgconf
+*.uvguix.lenovo
+*.uvoptx
+*.uvprojx
+*.build_log.htm
+*.htm
+*.map
+*.lnp
+*.sct
+*.crf
+*.lst
+
+
+# Kernel Module Compile Results
+*.mod*
+*.cmd
+*.htm
+*.html
+.tmp_versions/
+modules.order
+Module.symvers
+Mkfile.old
+dkms.conf
+*.cyclo
+*.settings.*
+

STM32CubeIDE/.settings/stm32cubeide.project.prefs

@@ -1,4 +1,4 @@
 2F62501ED4689FB349E356AB974DBE57=95112E708683D54F6AC1ADC68D917C29
 8DF89ED150041C4CBC7CB9A9CAA90856=95112E708683D54F6AC1ADC68D917C29
-DC22A860405A8BF2F2C095E5B6529F12=708FD40520C1EE5CFD2122309291F653
+DC22A860405A8BF2F2C095E5B6529F12=74CD6EB106FB50B767E4FE71225C7638
 eclipse.preferences.version=1

STM32CubeIDE/WL55JC_AS923.cfg

@@ -0,0 +1,46 @@
+# This is an NUCLEO-WL55JC1 board with a single STM32WL55JCIx chip
+#
+# Generated by STM32CubeIDE
+# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s)
+
+source [find interface/stlink-dap.cfg]
+
+st-link backend tcp
+
+set WORKAREASIZE 0x8000
+
+transport select "dapdirect_swd"
+
+set CHIPNAME STM32WL55JCIx
+set BOARDNAME NUCLEO-WL55JC1
+
+# Enable debug when in low power modes
+set ENABLE_LOW_POWER 1
+
+# Stop Watchdog counters when halt
+set STOP_WATCHDOG 1
+
+# STlink Debug clock frequency
+set CLOCK_FREQ 8000
+
+# Reset configuration
+# use hardware reset, connect under reset
+# connect_assert_srst needed if low power mode application running (WFI...)
+reset_config srst_only srst_nogate connect_assert_srst
+set CONNECT_UNDER_RESET 1
+set CORE_RESET 0
+
+# ACCESS PORT NUMBER
+set AP_NUM 0
+# GDB PORT
+set GDB_PORT 3333
+
+
+
+
+set DUAL_CORE 1
+
+# BCTM CPU variables
+
+source [find target/stm32wlx.cfg]
+