From 49c056d6413e17eba424711f107455137767660c Mon Sep 17 00:00:00 2001 From: YunHorn Technology Date: Thu, 24 Oct 2024 14:02:53 +0800 Subject: [PATCH] stable R4-AAA --- Core/Inc/sys_conf.h | 8 +-- Core/Src/dma.c | 19 +++++- Core/Src/i2c.c | 4 +- Core/Src/stm32wlxx_it.c | 83 ++++++++++++++++++++++--- Core/Src/usart.c | 28 ++++++++- Core/Src/usart_if.c | 2 +- LoRaWAN/App/lora_app.c | 11 ++-- STS/Core/Src/yunhorn_sts_process.c | 98 +++++++++++++++++------------- 8 files changed, 189 insertions(+), 64 deletions(-) diff --git a/Core/Inc/sys_conf.h b/Core/Inc/sys_conf.h index f10502a..4941614 100644 --- a/Core/Inc/sys_conf.h +++ b/Core/Inc/sys_conf.h @@ -47,12 +47,12 @@ extern "C" { /** * @brief Verbose level for all trace logs */ -#define VERBOSE_LEVEL VLEVEL_M +#define VERBOSE_LEVEL VLEVEL_OFF /** * @brief Enable trace logs */ -#define APP_LOG_ENABLED 1 +#define APP_LOG_ENABLED 0 /** * @brief Activate monitoring (probes) of some internal RF signals for debug purpose @@ -75,13 +75,13 @@ extern "C" { * @brief Enable/Disable MCU Debugger pins (dbg serial wires) * @note by HW serial wires are ON by default, need to put them OFF to save power */ -#define DEBUGGER_ENABLED 1 +#define DEBUGGER_ENABLED 0 /** * @brief Disable Low Power mode * @note 0: LowPowerMode enabled. MCU enters stop2 mode, 1: LowPowerMode disabled. MCU enters sleep mode only */ -#define LOW_POWER_DISABLE 1 +#define LOW_POWER_DISABLE 0 /* USER CODE BEGIN EC */ diff --git a/Core/Src/dma.c b/Core/Src/dma.c index d048a4e..7b1446b 100644 --- a/Core/Src/dma.c +++ b/Core/Src/dma.c @@ -58,9 +58,24 @@ void MX_DMA_Init(void) #endif /* DMA1_Channel5_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 2, 0); - HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); + // HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 2, 0); + // HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); + // I2C2 + /* DMA1_Channel4_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); + /* DMA1_Channel5_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); + + // USART2 + /* DMA1_Channel6_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn); + /* DMA1_Channel7_IRQn interrupt configuration */ + //HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0); + //HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn); } /* USER CODE BEGIN 2 */ diff --git a/Core/Src/i2c.c b/Core/Src/i2c.c index 311e22f..4f60034 100644 --- a/Core/Src/i2c.c +++ b/Core/Src/i2c.c @@ -112,7 +112,7 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) /* I2C2 DMA Init */ /* I2C2_RX Init */ - hdma_i2c2_rx.Instance = DMA1_Channel3; + hdma_i2c2_rx.Instance = DMA1_Channel4; hdma_i2c2_rx.Init.Request = DMA_REQUEST_I2C2_RX; hdma_i2c2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_i2c2_rx.Init.PeriphInc = DMA_PINC_DISABLE; @@ -134,7 +134,7 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) __HAL_LINKDMA(i2cHandle,hdmarx,hdma_i2c2_rx); /* I2C2_TX Init */ - hdma_i2c2_tx.Instance = DMA1_Channel4; + hdma_i2c2_tx.Instance = DMA1_Channel5; hdma_i2c2_tx.Init.Request = DMA_REQUEST_I2C2_TX; hdma_i2c2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; hdma_i2c2_tx.Init.PeriphInc = DMA_PINC_DISABLE; diff --git a/Core/Src/stm32wlxx_it.c b/Core/Src/stm32wlxx_it.c index 64715f8..1a5bcec 100644 --- a/Core/Src/stm32wlxx_it.c +++ b/Core/Src/stm32wlxx_it.c @@ -58,6 +58,7 @@ extern RTC_HandleTypeDef hrtc; extern SUBGHZ_HandleTypeDef hsubghz; extern DMA_HandleTypeDef hdma_usart2_tx; +extern DMA_HandleTypeDef hdma_usart2_rx; extern UART_HandleTypeDef huart2; /* USER CODE BEGIN EV */ //#if defined(VL53LX)||defined(VL53L0) @@ -258,7 +259,34 @@ void EXTI3_IRQHandler(void) /* USER CODE END EXTI3_IRQn 1 */ } -/* I2C2 */ +/** + * @brief This function handles EXTI Line 1 Interrupt. + */ +void EXTI4_IRQHandler(void) +{ + /* USER CODE BEGIN EXTI1_IRQn 0 */ + + /* USER CODE END EXTI1_IRQn 0 */ + //HAL_GPIO_EXTI_IRQHandler(TOF_INT_EXTI_PIN); + /* USER CODE BEGIN EXTI1_IRQn 1 */ + + /* USER CODE END EXTI1_IRQn 1 */ +} + +/* SPI1 */ +/** + * @brief This function handles DMA1 Channel 2 Interrupt. + */ +void DMA1_Channel2_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */ + + /* USER CODE END DMA1_Channel2_IRQn 0 */ + //HAL_DMA_IRQHandler(&hdma_spi1_rx); + /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */ + + /* USER CODE END DMA1_Channel2_IRQn 1 */ +} /** * @brief This function handles DMA1 Channel 3 Interrupt. */ @@ -267,13 +295,13 @@ void DMA1_Channel3_IRQHandler(void) /* USER CODE BEGIN DMA1_Channel3_IRQn 0 */ /* USER CODE END DMA1_Channel3_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_i2c2_rx); + //HAL_DMA_IRQHandler(&hdma_spi1_tx); /* USER CODE BEGIN DMA1_Channel3_IRQn 1 */ /* USER CODE END DMA1_Channel3_IRQn 1 */ } - +// I2C2 /** * @brief This function handles DMA1 Channel 4 Interrupt. */ @@ -282,14 +310,12 @@ void DMA1_Channel4_IRQHandler(void) /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_i2c2_tx); + HAL_DMA_IRQHandler(&hdma_i2c2_rx); /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */ /* USER CODE END DMA1_Channel4_IRQn 1 */ } - - /** * @brief This function handles DMA1 Channel 5 Interrupt. */ @@ -298,12 +324,41 @@ void DMA1_Channel5_IRQHandler(void) /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart2_tx); + HAL_DMA_IRQHandler(&hdma_i2c2_tx); /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */ /* USER CODE END DMA1_Channel5_IRQn 1 */ } +// USART2 +/** + * @brief This function handles DMA1 Channel 6 Interrupt. + */ +void DMA1_Channel6_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel6_IRQn 0 */ + + /* USER CODE END DMA1_Channel6_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart2_tx); + /* USER CODE BEGIN DMA1_Channel6_IRQn 1 */ + + /* USER CODE END DMA1_Channel6_IRQn 1 */ +} + +/** + * @brief This function handles DMA1 Channel 7 Interrupt. + */ +void DMA1_Channel7_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel7_IRQn 0 */ + + /* USER CODE END DMA1_Channel7_IRQn 0 */ + //HAL_DMA_IRQHandler(&hdma_usart2_rx); + /* USER CODE BEGIN DMA1_Channel7_IRQn 1 */ + + /* USER CODE END DMA1_Channel7_IRQn 1 */ +} + /** * @brief This function handles EXTI Lines [9:5] Interrupt. */ @@ -323,6 +378,20 @@ void EXTI9_5_IRQHandler(void) /* USER CODE END EXTI9_5_IRQn 1 */ } +/** + * @brief This function handles EXTI Lines [15:10] Interrupt. + */ +void EXTI15_10_IRQHandler(void) +{ + /* USER CODE BEGIN EXTI15_10_IRQn 0 */ + + /* USER CODE END EXTI15_10_IRQn 0 */ + //HAL_GPIO_EXTI_IRQHandler(TOF_INT_EXTI_PIN); + /* USER CODE BEGIN EXTI15_10_IRQn 1 */ + + /* USER CODE END EXTI15_10_IRQn 1 */ +} + /** * @brief This function handles USART2 Interrupt. */ diff --git a/Core/Src/usart.c b/Core/Src/usart.c index fa22f23..eaaf685 100644 --- a/Core/Src/usart.c +++ b/Core/Src/usart.c @@ -26,6 +26,7 @@ UART_HandleTypeDef huart2; DMA_HandleTypeDef hdma_usart2_tx; +DMA_HandleTypeDef hdma_usart2_rx; /* USART2 init function */ @@ -109,7 +110,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) /* USART2 DMA Init */ /* USART2_TX Init */ - hdma_usart2_tx.Instance = DMA1_Channel5; + hdma_usart2_tx.Instance = DMA1_Channel6; hdma_usart2_tx.Init.Request = DMA_REQUEST_USART2_TX; hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; @@ -129,6 +130,29 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) } #endif __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx); +#if 0 + /* USART2_RX Init */ + hdma_usart2_rx.Instance = DMA1_Channel7; + hdma_usart2_rx.Init.Request = DMA_REQUEST_USART2_RX; + hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; + hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_usart2_rx.Init.Mode = DMA_NORMAL; + hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW; + if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) + { + Error_Handler(); + } +#ifdef STM32WL55xx + if (HAL_DMA_ConfigChannelAttributes(&hdma_usart2_rx, DMA_CHANNEL_NPRIV) != HAL_OK) + { + Error_Handler(); + } +#endif + __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx); +#endif /* USART2 interrupt Init */ HAL_NVIC_SetPriority(USART2_IRQn, 2, 0); @@ -158,7 +182,7 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) /* USART2 DMA DeInit */ HAL_DMA_DeInit(uartHandle->hdmatx); - + //HAL_DMA_DeInit(uartHandle->hdmarx); /* USART2 interrupt Deinit */ HAL_NVIC_DisableIRQ(USART2_IRQn); /* USER CODE BEGIN USART2_MspDeInit 1 */ diff --git a/Core/Src/usart_if.c b/Core/Src/usart_if.c index 9f0331e..8ac0e4a 100644 --- a/Core/Src/usart_if.c +++ b/Core/Src/usart_if.c @@ -127,7 +127,7 @@ UTIL_ADV_TRACE_Status_t vcom_DeInit(void) /* ##-3- Disable the NVIC for DMA ########################################### */ /* USER CODE BEGIN 1 */ - HAL_NVIC_DisableIRQ(DMA1_Channel5_IRQn); + HAL_NVIC_DisableIRQ(DMA1_Channel6_IRQn); return UTIL_ADV_TRACE_OK; /* USER CODE END 1 */ diff --git a/LoRaWAN/App/lora_app.c b/LoRaWAN/App/lora_app.c index d5a36cd..910d173 100644 --- a/LoRaWAN/App/lora_app.c +++ b/LoRaWAN/App/lora_app.c @@ -490,6 +490,9 @@ void LoRaWAN_Init(void) LmHandlerJoin(ActivationType, ForceRejoin); + UTIL_TIMER_Create(&YunhornSTSHeartBeatTimer, 1000*STS_HeartBeatTimerPeriod_sec, UTIL_TIMER_ONESHOT, OnYunhornSTSHeartBeatTimerEvent, NULL); + UTIL_TIMER_Start(&YunhornSTSHeartBeatTimer); + if (EventType == TX_ON_TIMER) { @@ -536,8 +539,8 @@ void LoRaWAN_Init(void) #endif //UTIL_TIMER_Create(&YunhornSTSHeartBeatTimer, 1000*STS_HeartBeatTimerPeriod_sec, UTIL_TIMER_PERIODIC, OnYunhornSTSHeartBeatTimerEvent, NULL); - UTIL_TIMER_Create(&YunhornSTSHeartBeatTimer, 1000*STS_HeartBeatTimerPeriod_sec, UTIL_TIMER_ONESHOT, OnYunhornSTSHeartBeatTimerEvent, NULL); - UTIL_TIMER_Start(&YunhornSTSHeartBeatTimer); +// UTIL_TIMER_Create(&YunhornSTSHeartBeatTimer, 1000*STS_HeartBeatTimerPeriod_sec, UTIL_TIMER_ONESHOT, OnYunhornSTSHeartBeatTimerEvent, NULL); +// UTIL_TIMER_Start(&YunhornSTSHeartBeatTimer); /* USER CODE END LoRaWAN_Init_Last */ } @@ -1446,7 +1449,7 @@ void OnYunhornSTSHeartBeatPeriodicityChanged(uint32_t newperiodicity) UTIL_TIMER_Start(&YunhornSTSHeartBeatTimer); /* USER CODE BEGIN OnYunhornSTSHeartBeatPeriodicityChanged_2 */ - APP_LOG(TS_OFF, VLEVEL_M,"* STS HeartBeatPeriodicity = %u (sec)\r\n", newperiodicity/1000 ); + APP_LOG(TS_OFF, VLEVEL_H,"* STS HeartBeatPeriodicity = %u (sec)\r\n", newperiodicity/1000 ); /* USER CODE END OnYunhornSTSHeartBeatPeriodicityChanged_2 */ } @@ -1479,6 +1482,6 @@ void OnYunhornSTSTxPeriodicityChanged(uint32_t periodicity) UTIL_TIMER_Start(&TxTimer); /* USER CODE BEGIN OnYunhornSTSTxPeriodicityChanged */ - APP_LOG(TS_OFF, VLEVEL_M,"\n* STS TxPeriodicity = %u (sec)\r\n", TxPeriodicity/1000 ); + APP_LOG(TS_OFF, VLEVEL_H,"\n* STS TxPeriodicity = %u (sec)\r\n", TxPeriodicity/1000 ); /* USER CODE END OnYunhornSTSTxPeriodicityChanged */ } diff --git a/STS/Core/Src/yunhorn_sts_process.c b/STS/Core/Src/yunhorn_sts_process.c index 4caa80a..544038a 100644 --- a/STS/Core/Src/yunhorn_sts_process.c +++ b/STS/Core/Src/yunhorn_sts_process.c @@ -54,9 +54,14 @@ volatile sts_cfg_nvm_t sts_cfg_nvm = { sts_version, sts_hardware_ver, 0x05, //Regular TxPeriodicity interval - 'M', //Uplink data interval unit, for heart-beat uplink + 'M', //TxPeriodicity Uplink data interval unit +#if defined(STS_P2)||defined(L8)||defined(STS_O6T)||defined(STS_T6) 0x01, //Heart-beat interval or Sampling interval 'S', //Sampling sensor interval unit, for real-time sensing of MEMS +#else + 0x3C, //Heart-beat interval , for heart-beat uplink + 'M', //Heart-beat interval unit +#endif 0x04, // dual mode=4, uni_mode =5 0x00, // sts service mask 0x00, //sts_ioc_mask @@ -101,7 +106,7 @@ volatile sts_cfg_nvm_t sts_cfg_nvm = { // below 20 bytes for RFAC code {0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0} }; -//volatile uint8_t nvm_store_value[YUNHORN_STS_MAX_NVM_CFG_SIZE]={0x0}; +volatile uint8_t nvm_store_value[YUNHORN_STS_MAX_NVM_CFG_SIZE]={0x0}; volatile uint8_t sts_ac_code[20]={0x0}; volatile uint8_t sts_service_mask=STS_SERVICE_MASK_L0; volatile uint8_t sts_work_mode=4; @@ -1438,50 +1443,56 @@ void OnStoreSTSCFGContextRequest(void) { /* USER CODE BEGIN OnStoreContextRequest_1 */ uint8_t i=0,j=0; - uint8_t nvm_store_value[YUNHORN_STS_MAX_NVM_CFG_SIZE]={0x0}; /* KEEP THIS LOCAL */ + uint8_t to_store__value[YUNHORN_STS_MAX_NVM_CFG_SIZE]={0x0}; /* KEEP THIS LOCAL */ sts_cfg_nvm.length = STS_NVM_CFG_SIZE; - nvm_store_value[i++] = sts_cfg_nvm.mtmcode1; - nvm_store_value[i++] = sts_cfg_nvm.mtmcode2; - nvm_store_value[i++] = sts_cfg_nvm.version; - nvm_store_value[i++] = sts_cfg_nvm.hardware_ver; - nvm_store_value[i++] = sts_cfg_nvm.periodicity; - nvm_store_value[i++] = sts_cfg_nvm.unit; - nvm_store_value[i++] = sts_cfg_nvm.sampling; - nvm_store_value[i++] = sts_cfg_nvm.s_unit; - nvm_store_value[i++] = sts_cfg_nvm.work_mode; - nvm_store_value[i++] = sts_cfg_nvm.sts_service_mask; - nvm_store_value[i++] = sts_cfg_nvm.sts_ioc_mask; - nvm_store_value[i++] = (uint8_t) STS_CFG_PCFG_SIZE; //sts_cfg_nvm.length; + to_store__value[i++] = sts_cfg_nvm.mtmcode1; + to_store__value[i++] = sts_cfg_nvm.mtmcode2; + to_store__value[i++] = sts_cfg_nvm.version; + to_store__value[i++] = sts_cfg_nvm.hardware_ver; + to_store__value[i++] = sts_cfg_nvm.periodicity; + to_store__value[i++] = sts_cfg_nvm.unit; + to_store__value[i++] = sts_cfg_nvm.sampling; + to_store__value[i++] = sts_cfg_nvm.s_unit; + to_store__value[i++] = sts_cfg_nvm.work_mode; + to_store__value[i++] = sts_cfg_nvm.sts_service_mask; + to_store__value[i++] = sts_cfg_nvm.sts_ioc_mask; + to_store__value[i++] = (uint8_t) STS_CFG_PCFG_SIZE; //sts_cfg_nvm.length; for (j = 0; j < STS_CFG_PCFG_SIZE; j++) { - nvm_store_value[i++] = (sts_cfg_nvm.p[j]); + to_store__value[i++] = (sts_cfg_nvm.p[j]); } - nvm_store_value[i++] = sts_cfg_nvm.reserve02; - nvm_store_value[i++] = sts_cfg_nvm.reserve03; - nvm_store_value[i++] = sts_cfg_nvm.sensor_install_height_in_10cm; - nvm_store_value[i++] = sts_cfg_nvm.alarm_parameter05; - nvm_store_value[i++] = sts_cfg_nvm.alarm_mute_reset_timer_in_10sec; - nvm_store_value[i++] = sts_cfg_nvm.alarm_lamp_bar_flashing_color; - nvm_store_value[i++] = sts_cfg_nvm.occupancy_overtime_threshold_in_10min; + to_store__value[i++] = sts_cfg_nvm.reserve02; + to_store__value[i++] = sts_cfg_nvm.reserve03; + to_store__value[i++] = sts_cfg_nvm.sensor_install_height_in_10cm; + to_store__value[i++] = sts_cfg_nvm.alarm_parameter05; + to_store__value[i++] = sts_cfg_nvm.alarm_mute_reset_timer_in_10sec; + to_store__value[i++] = sts_cfg_nvm.alarm_lamp_bar_flashing_color; + to_store__value[i++] = sts_cfg_nvm.occupancy_overtime_threshold_in_10min; - nvm_store_value[i++] = sts_cfg_nvm.motionless_duration_threshold_in_min; - nvm_store_value[i++] = sts_cfg_nvm.unconscious_or_motionless_level_threshold; - nvm_store_value[i++] = sts_cfg_nvm.fall_detection_acc_threshold; - nvm_store_value[i++] = sts_cfg_nvm.fall_detection_depth_threshold; - nvm_store_value[i++] = sts_cfg_nvm.fall_confirm_threshold_in_10sec; + to_store__value[i++] = sts_cfg_nvm.motionless_duration_threshold_in_min; + to_store__value[i++] = sts_cfg_nvm.unconscious_or_motionless_level_threshold; + to_store__value[i++] = sts_cfg_nvm.fall_detection_acc_threshold; + to_store__value[i++] = sts_cfg_nvm.fall_detection_depth_threshold; + to_store__value[i++] = sts_cfg_nvm.fall_confirm_threshold_in_10sec; - if ((sts_cfg_nvm.ac[0]!=0x0) && (sts_cfg_nvm.ac[19]!=0x0)) { - for (j = 0; j < YUNHORN_STS_AC_CODE_SIZE; j++) { - nvm_store_value[i++] = (sts_cfg_nvm.ac[j]); - } + if ((nvm_store_value[NVM_AC_CODE_START]!= 0x0) && (nvm_store_value[NVM_AC_CODE_START+19]!=0x0)) + { + //APP_LOG(TS_OFF, VLEVEL_M, "\n\r Transfer good NVM Stored ac_code to NVM_STORE_VALUE\r\n"); + UTIL_MEM_cpy_8((void*)&to_store__value[NVM_AC_CODE_START], (void*)&nvm_store_value[NVM_AC_CODE_START],YUNHORN_STS_AC_CODE_SIZE); + } else if ((sts_ac_code[0]!=0x0) && (sts_ac_code[YUNHORN_STS_AC_CODE_SIZE-1]!=0x0)) + { + //APP_LOG(TS_OFF, VLEVEL_M, "\n\r Transfer new generated ac_code to NVM_STORE_VALUE\r\n"); + UTIL_MEM_cpy_8((void*)&to_store__value[NVM_AC_CODE_START], (void*)sts_ac_code,YUNHORN_STS_AC_CODE_SIZE); + UTIL_MEM_cpy_8((void*)&nvm_store_value[NVM_AC_CODE_START], (void*)sts_ac_code,YUNHORN_STS_AC_CODE_SIZE); } + /* USER CODE END OnStoreContextRequest_1 */ /* store nvm in flash */ if (FLASH_IF_Erase(STS_CONFIG_NVM_BASE_ADDRESS, FLASH_PAGE_SIZE) == FLASH_IF_OK) { - FLASH_IF_Write(STS_CONFIG_NVM_BASE_ADDRESS, (const void *)nvm_store_value, YUNHORN_STS_MAX_NVM_CFG_SIZE); + FLASH_IF_Write(STS_CONFIG_NVM_BASE_ADDRESS, (const void *)to_store__value, YUNHORN_STS_MAX_NVM_CFG_SIZE); } /* USER CODE BEGIN OnStoreContextRequest_Last */ @@ -1505,14 +1516,15 @@ void OnRestoreSTSCFGContextRequest(uint8_t *cfg_in_nvm) void STS_REBOOT_CONFIG_Init(void) { /* USER CODE BEGIN OnRestoreContextRequest_1 */ - uint8_t nvm_store_value[YUNHORN_STS_MAX_NVM_CFG_SIZE]={0x0}; + //uint8_t nvm_store_value[YUNHORN_STS_MAX_NVM_CFG_SIZE]={0x0}; /* USER CODE END OnRestoreContextRequest_1 */ - FLASH_IF_Read(nvm_store_value, STS_CONFIG_NVM_BASE_ADDRESS, YUNHORN_STS_MAX_NVM_CFG_SIZE); + FLASH_IF_Read((void*)nvm_store_value, (void*)STS_CONFIG_NVM_BASE_ADDRESS, YUNHORN_STS_MAX_NVM_CFG_SIZE); + //STS_Show_STS_CFG_NVM((uint8_t*)nvm_store_value); /* USER CODE BEGIN OnRestoreContextRequest_Last */ if ((nvm_store_value[NVM_MTM1] != sts_mtmcode1) || (nvm_store_value[NVM_MTM2] != sts_mtmcode2) || (nvm_store_value[NVM_VER] != sts_version)) { - APP_LOG(TS_OFF, VLEVEL_M, "\r\nInitial Boot with Empty Config, Flash with default config....\r\n"); + APP_LOG(TS_OFF, VLEVEL_L, "\r\nInitial Boot with Empty Config, Flash with default config....\r\n"); OnStoreSTSCFGContextRequest(); //UTIL_MEM_set_8((void *)sts_ac_code, 0x00, YUNHORN_STS_AC_CODE_SIZE); HAL_Delay(1000); @@ -1555,7 +1567,7 @@ void STS_REBOOT_CONFIG_Init(void) } } - STS_Show_STS_CFG_NVM((uint8_t*)nvm_store_value); + //STS_Show_STS_CFG_NVM((uint8_t*)nvm_store_value); OnRestoreSTSCFGContextProcess(); /* USER CODE END OnRestoreContextRequest_Last */ @@ -1573,7 +1585,7 @@ void OnRestoreSTSCFGContextProcess(void) } periodicity = (periodicity > 10)? periodicity : 10; // in seconds unit - APP_LOG(TS_OFF, VLEVEL_M, "\n\n Tx periodicity in NVM =%u sec\n",periodicity); + APP_LOG(TS_OFF, VLEVEL_H, "\n\n Tx periodicity in NVM =%u sec\n",periodicity); TxPeriodicity= periodicity*1000; // to ms STS_TxPeriod_sec = periodicity; @@ -1588,7 +1600,7 @@ void OnRestoreSTSCFGContextProcess(void) } STS_HeartBeatTimerPeriod_sec = MAX(sampling_heartbeat_periodicity,5*periodicity); - APP_LOG(TS_OFF, VLEVEL_M, "\n\n sampling or heartbeat periodicity in NVM =%u sec\n",sampling_heartbeat_periodicity); + APP_LOG(TS_OFF, VLEVEL_H, "\n\n sampling or heartbeat periodicity in NVM =%u sec\n",sampling_heartbeat_periodicity); if ((sts_cfg_nvm.ac[0] ==0x0 )&& (sts_cfg_nvm.ac[19]==0x0)) { // ensure it's not in production yet @@ -1645,16 +1657,18 @@ void OnRestoreSTSCFGContextProcess(void) } -static void STS_Show_STS_CFG_NVM(uint8_t * nvm_store_value) +static void STS_Show_STS_CFG_NVM(uint8_t * store_value) { - APP_LOG(TS_OFF, VLEVEL_M, "\n *** STS_CFG_NVM ***\n"); + APP_LOG(TS_OFF, VLEVEL_M, "\n-----------------------------------------------\n"); APP_LOG(TS_OFF, VLEVEL_M, "\n00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15\n"); for (uint8_t i=0; i