From 718c3c4b751afdb23b789ecfd5170cce717b32c1 Mon Sep 17 00:00:00 2001 From: YunHorn Technology Date: Mon, 10 Mar 2025 19:46:52 +0800 Subject: [PATCH] update heartbeat port for R1x and R5x --- LoRaWAN/App/lora_app.c | 4 +- STM32CubeIDE/.cproject | 2 +- .../Release/Application/User/Core/subdir.mk | 38 +++++----- .../Application/User/LoRaWAN/App/subdir.mk | 8 +-- .../Application/User/LoRaWAN/Target/subdir.mk | 2 +- .../Application/User/STS/Core/Src/subdir.mk | 6 +- .../Application/User/STS/TOF/App/subdir.mk | 6 +- .../Application/User/STS/TOF/Target/subdir.mk | 2 +- .../User/STS/TOF/vl53l0x/subdir.mk | 14 ++-- STM32CubeIDE/Release/Drivers/CMSIS/subdir.mk | 2 +- .../Drivers/STM32WLxx_HAL_Driver/subdir.mk | 48 ++++++------- .../Release/Middlewares/LoRaWAN/subdir.mk | 66 +++++++++--------- .../Release/Middlewares/SubGHz_Phy/subdir.mk | 6 +- .../Release/STS_R1x_KWH_HK_20250310.elf | Bin 0 -> 190468 bytes .../Release/STS_R5x_KWH_HK_20250310.elf | Bin 0 -> 190468 bytes STM32CubeIDE/Release/Utilities/subdir.mk | 16 ++--- STM32CubeIDE/Release/WLE5CC_NODE_STS.elf | Bin 0 -> 190468 bytes STS/Core/Inc/yunhorn_sts_prd_conf.h | 6 +- 18 files changed, 113 insertions(+), 113 deletions(-) create mode 100644 STM32CubeIDE/Release/STS_R1x_KWH_HK_20250310.elf create mode 100644 STM32CubeIDE/Release/STS_R5x_KWH_HK_20250310.elf create mode 100644 STM32CubeIDE/Release/WLE5CC_NODE_STS.elf diff --git a/LoRaWAN/App/lora_app.c b/LoRaWAN/App/lora_app.c index 318b9b6..51e8667 100644 --- a/LoRaWAN/App/lora_app.c +++ b/LoRaWAN/App/lora_app.c @@ -1439,11 +1439,11 @@ static void OnYunhornSTSHeartBeatTimerEvent(void *context) #if 1 #ifdef STS_P2 appHeartBeatDataPort = YUNHORN_STS_P2_LORA_APP_HTBT_PORT; -#elif defined(STS_R1) +#elif defined(STS_R1)||defined(STS_R1x) appHeartBeatDataPort = YUNHORN_STS_R1_LORA_APP_HTBT_PORT; #elif defined(STS_R1D) appHeartBeatDataPort = YUNHORN_STS_R1D_LORA_APP_HTBT_PORT; -#elif defined(STS_R5) +#elif defined(STS_R5)||defined(STS_R5x) appHeartBeatDataPort = YUNHORN_STS_R5_LORA_APP_HTBT_PORT; #elif defined(STS_R4) appHeartBeatDataPort = YUNHORN_STS_R4_LORA_APP_HTBT_PORT; diff --git a/STM32CubeIDE/.cproject b/STM32CubeIDE/.cproject index c0f5819..c7f3fdd 100644 --- a/STM32CubeIDE/.cproject +++ b/STM32CubeIDE/.cproject @@ -139,7 +139,7 @@