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RTM PWH_F2_2025JAN08_R2

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Yunhorn 2025-01-08 16:26:51 +08:00
parent 12ee4bc3d4
commit ba8f726136
5 changed files with 6 additions and 6 deletions
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6
Core/Inc/sys_conf.h
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@ -47,12 +47,12 @@ extern "C" {
/** /**
* @brief Verbose level for all trace logs * @brief Verbose level for all trace logs
*/ */
#define VERBOSE_LEVEL VLEVEL_L #define VERBOSE_LEVEL VLEVEL_OFF
/** /**
* @brief Enable trace logs * @brief Enable trace logs
*/ */
#define APP_LOG_ENABLED 1 #define APP_LOG_ENABLED 0
/** /**
* @brief Activate monitoring (probes) of some internal RF signals for debug purpose * @brief Activate monitoring (probes) of some internal RF signals for debug purpose
@ -75,7 +75,7 @@ extern "C" {
* @brief Enable/Disable MCU Debugger pins (dbg serial wires) * @brief Enable/Disable MCU Debugger pins (dbg serial wires)
* @note by HW serial wires are ON by default, need to put them OFF to save power * @note by HW serial wires are ON by default, need to put them OFF to save power
*/ */
#define DEBUGGER_ENABLED 1 #define DEBUGGER_ENABLED 0
/** /**
* @brief Disable Low Power mode * @brief Disable Low Power mode

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STM32CubeIDE/Release/STS_L8_PWH_F2_RTM_2025JAN08_R2.elf Normal file
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STM32CubeIDE/Release/WLE5CC_NODE_STS.bin
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STM32CubeIDE/Release/WLE5CC_NODE_STS.elf
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6
STS/Core/Inc/yunhorn_sts_prd_conf.h
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@ -185,9 +185,9 @@
#define sts_appctrl_reply_port (YUNHORN_STS_USER_APP_CTRL_REPLY_PORT) #define sts_appctrl_reply_port (YUNHORN_STS_USER_APP_CTRL_REPLY_PORT)
/* General Settings */ /* General Settings */
#define MajorVer 24U #define MajorVer 25U
#define MinorVer 11U #define MinorVer 1U
#define SubMinorVer 27U #define SubMinorVer 8U
#define FirmwareVersion 3U #define FirmwareVersion 3U
#define YUNHORN_STS_MAX_NVM_CFG_SIZE 64U #define YUNHORN_STS_MAX_NVM_CFG_SIZE 64U
#define YUNHORN_STS_AC_CODE_SIZE 20U #define YUNHORN_STS_AC_CODE_SIZE 20U