diff --git a/Core/Inc/sys_conf.h b/Core/Inc/sys_conf.h
index f10502a..241072d 100644
--- a/Core/Inc/sys_conf.h
+++ b/Core/Inc/sys_conf.h
@@ -47,12 +47,12 @@ extern "C" {
 /**
   * @brief  Verbose level for all trace logs
   */
-#define VERBOSE_LEVEL                        VLEVEL_M
+#define VERBOSE_LEVEL                        VLEVEL_OFF
 
 /**
   * @brief Enable trace logs
   */
-#define APP_LOG_ENABLED                      1
+#define APP_LOG_ENABLED                      0
 
 /**
   * @brief Activate monitoring (probes) of some internal RF signals for debug purpose
@@ -75,7 +75,7 @@ extern "C" {
   * @brief Enable/Disable MCU Debugger pins (dbg serial wires)
   * @note  by HW serial wires are ON by default, need to put them OFF to save power
   */
-#define DEBUGGER_ENABLED                     1
+#define DEBUGGER_ENABLED                     0
 
 /**
   * @brief Disable Low Power mode
diff --git a/STM32CubeIDE/Release/WLE5CC_NODE_STS.elf b/STM32CubeIDE/Release/WLE5CC_NODE_STS.elf
index 2ebee8c..35752fa 100644
Binary files a/STM32CubeIDE/Release/WLE5CC_NODE_STS.elf and b/STM32CubeIDE/Release/WLE5CC_NODE_STS.elf differ
diff --git a/STM32CubeIDE/Release/sts_o6t_rtm_atal_20250509r1.elf b/STM32CubeIDE/Release/sts_o6t_rtm_atal_20250509r1.elf
new file mode 100644
index 0000000..35752fa
Binary files /dev/null and b/STM32CubeIDE/Release/sts_o6t_rtm_atal_20250509r1.elf differ
diff --git a/STS/Core/Inc/yunhorn_sts_prd_conf.h b/STS/Core/Inc/yunhorn_sts_prd_conf.h
index 4d51032..072b2c7 100644
--- a/STS/Core/Inc/yunhorn_sts_prd_conf.h
+++ b/STS/Core/Inc/yunhorn_sts_prd_conf.h
@@ -229,8 +229,8 @@
 
  /*		General Settings							*/
 #define MajorVer									25U
-#define MinorVer									1U
-#define SubMinorVer 								3U
+#define MinorVer									5U
+#define SubMinorVer 								9U
 #define FirmwareVersion								3U
 #define	YUNHORN_STS_MAX_NVM_CFG_SIZE				64U
 #define YUNHORN_STS_AC_CODE_SIZE					20U