300 lines
5.9 KiB
C
300 lines
5.9 KiB
C
/**
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******************************************************************************
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* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#ifndef _VL53L1_HIST_STRUCTS_H_
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#define _VL53L1_HIST_STRUCTS_H_
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#include "vl53l1_ll_device.h"
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#include "vl53l1_dmax_structs.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#define VL53L1_MAX_BIN_SEQUENCE_LENGTH 6
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#define VL53L1_MAX_BIN_SEQUENCE_CODE 15
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#define VL53L1_HISTOGRAM_BUFFER_SIZE 24
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#define VL53L1_XTALK_HISTO_BINS 12
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typedef struct {
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uint8_t histogram_config__spad_array_selection;
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uint8_t histogram_config__low_amb_even_bin_0_1;
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uint8_t histogram_config__low_amb_even_bin_2_3;
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uint8_t histogram_config__low_amb_even_bin_4_5;
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uint8_t histogram_config__low_amb_odd_bin_0_1;
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uint8_t histogram_config__low_amb_odd_bin_2_3;
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uint8_t histogram_config__low_amb_odd_bin_4_5;
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uint8_t histogram_config__mid_amb_even_bin_0_1;
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uint8_t histogram_config__mid_amb_even_bin_2_3;
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uint8_t histogram_config__mid_amb_even_bin_4_5;
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uint8_t histogram_config__mid_amb_odd_bin_0_1;
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uint8_t histogram_config__mid_amb_odd_bin_2;
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uint8_t histogram_config__mid_amb_odd_bin_3_4;
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uint8_t histogram_config__mid_amb_odd_bin_5;
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uint8_t histogram_config__user_bin_offset;
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uint8_t histogram_config__high_amb_even_bin_0_1;
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uint8_t histogram_config__high_amb_even_bin_2_3;
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uint8_t histogram_config__high_amb_even_bin_4_5;
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uint8_t histogram_config__high_amb_odd_bin_0_1;
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uint8_t histogram_config__high_amb_odd_bin_2_3;
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uint8_t histogram_config__high_amb_odd_bin_4_5;
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uint16_t histogram_config__amb_thresh_low;
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uint16_t histogram_config__amb_thresh_high;
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} VL53L1_histogram_config_t;
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typedef struct {
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VL53L1_HistAlgoSelect hist_algo_select;
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VL53L1_HistTargetOrder hist_target_order;
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uint8_t filter_woi0;
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uint8_t filter_woi1;
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VL53L1_HistAmbEstMethod hist_amb_est_method;
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uint8_t ambient_thresh_sigma0;
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uint8_t ambient_thresh_sigma1;
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uint16_t ambient_thresh_events_scaler;
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int32_t min_ambient_thresh_events;
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uint16_t noise_threshold;
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int32_t signal_total_events_limit;
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uint8_t sigma_estimator__sigma_ref_mm;
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uint16_t sigma_thresh;
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int16_t range_offset_mm;
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uint16_t gain_factor;
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uint8_t valid_phase_low;
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uint8_t valid_phase_high;
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uint8_t algo__consistency_check__phase_tolerance;
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uint8_t algo__consistency_check__event_sigma;
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uint16_t algo__consistency_check__event_min_spad_count;
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uint16_t algo__consistency_check__min_max_tolerance;
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uint8_t algo__crosstalk_compensation_enable;
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uint32_t algo__crosstalk_compensation_plane_offset_kcps;
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int16_t algo__crosstalk_compensation_x_plane_gradient_kcps;
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int16_t algo__crosstalk_compensation_y_plane_gradient_kcps;
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int16_t algo__crosstalk_detect_min_valid_range_mm;
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int16_t algo__crosstalk_detect_max_valid_range_mm;
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uint16_t algo__crosstalk_detect_max_valid_rate_kcps;
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uint16_t algo__crosstalk_detect_max_sigma_mm;
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uint8_t algo__crosstalk_detect_event_sigma;
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uint16_t algo__crosstalk_detect_min_max_tolerance;
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} VL53L1_hist_post_process_config_t;
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typedef struct {
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VL53L1_DeviceState cfg_device_state;
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VL53L1_DeviceState rd_device_state;
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uint8_t zone_id;
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uint32_t time_stamp;
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uint8_t VL53L1_p_022;
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uint8_t VL53L1_p_023;
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uint8_t VL53L1_p_024;
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uint8_t number_of_ambient_bins;
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uint8_t bin_seq[VL53L1_MAX_BIN_SEQUENCE_LENGTH];
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uint8_t bin_rep[VL53L1_MAX_BIN_SEQUENCE_LENGTH];
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int32_t bin_data[VL53L1_HISTOGRAM_BUFFER_SIZE];
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uint8_t result__interrupt_status;
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uint8_t result__range_status;
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uint8_t result__report_status;
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uint8_t result__stream_count;
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uint16_t result__dss_actual_effective_spads;
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uint16_t phasecal_result__reference_phase;
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uint8_t phasecal_result__vcsel_start;
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uint8_t cal_config__vcsel_start;
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uint16_t vcsel_width;
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uint8_t VL53L1_p_009;
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uint16_t VL53L1_p_019;
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uint32_t total_periods_elapsed;
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uint32_t peak_duration_us;
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uint32_t woi_duration_us;
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int32_t min_bin_value;
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int32_t max_bin_value;
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uint16_t zero_distance_phase;
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uint8_t number_of_ambient_samples;
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int32_t ambient_events_sum;
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int32_t VL53L1_p_004;
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uint8_t roi_config__user_roi_centre_spad;
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uint8_t roi_config__user_roi_requested_global_xy_size;
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} VL53L1_histogram_bin_data_t;
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typedef struct {
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uint8_t zone_id;
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uint32_t time_stamp;
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uint8_t VL53L1_p_022;
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uint8_t VL53L1_p_023;
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uint8_t VL53L1_p_024;
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uint32_t bin_data[VL53L1_XTALK_HISTO_BINS];
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uint16_t phasecal_result__reference_phase;
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uint8_t phasecal_result__vcsel_start;
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uint8_t cal_config__vcsel_start;
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uint16_t vcsel_width;
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uint16_t VL53L1_p_019;
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uint16_t zero_distance_phase;
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} VL53L1_xtalk_histogram_shape_t;
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typedef struct {
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VL53L1_xtalk_histogram_shape_t xtalk_shape;
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VL53L1_histogram_bin_data_t xtalk_hist_removed;
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} VL53L1_xtalk_histogram_data_t;
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#ifdef __cplusplus
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}
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#endif
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#endif
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