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<tr class="memitem:structARM__DRIVER__ETH__PHY"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__interface__gr.html#structARM__DRIVER__ETH__PHY">ARM_DRIVER_ETH_PHY</a></td></tr>
<tr class="memdesc:structARM__DRIVER__ETH__PHY"><td class="mdescLeft"> </td><td class="mdescRight">Access structure of the Ethernet PHY Driver. <a href="group__eth__phy__interface__gr.html#structARM__DRIVER__ETH__PHY">More...</a><br/></td></tr>
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<tr class="memitem:abb996b4afe22e0600aff5623076d0505"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__ETH__PHY_8h.html#abb996b4afe22e0600aff5623076d0505">ARM_ETH_PHY_API_VERSION</a>   <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,1) /* API version */</td></tr>
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<tr class="memitem:a261d0c3527c5880cbce44c92c5779a95"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__ETH__PHY_8h.html#a261d0c3527c5880cbce44c92c5779a95">_ARM_Driver_ETH_PHY_</a>(n)   Driver_ETH_PHY##n</td></tr>
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<tr class="memitem:a4d6d9b4a50776a881488782b9576af59"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__ETH__PHY_8h.html#a4d6d9b4a50776a881488782b9576af59">ARM_Driver_ETH_PHY_</a>(n)   <a class="el" href="Driver__ETH__PHY_8h.html#a261d0c3527c5880cbce44c92c5779a95">_ARM_Driver_ETH_PHY_</a>(n)</td></tr>
<tr class="separator:a4d6d9b4a50776a881488782b9576af59"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a13700fab82aa60a3357614faa0619e97"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__ETH__PHY_8h.html#a13700fab82aa60a3357614faa0619e97">ARM_ETH_PHY_SPEED_Pos</a>   0</td></tr>
<tr class="separator:a13700fab82aa60a3357614faa0619e97"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a8802cb0c4caed22c70d92f656e0811f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__ETH__PHY_8h.html#a8802cb0c4caed22c70d92f656e0811f5">ARM_ETH_PHY_SPEED_Msk</a>   (3UL << ARM_ETH_PHY_SPEED_Pos)</td></tr>
<tr class="separator:a8802cb0c4caed22c70d92f656e0811f5"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gabc7acc4ebe828c3d0825400e14ad20f0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__mode__ctrls.html#gabc7acc4ebe828c3d0825400e14ad20f0">ARM_ETH_PHY_SPEED_10M</a>   (<a class="el" href="Driver__ETH_8h.html#a1f834c4c785d7f69b1eaca011ee298ec">ARM_ETH_SPEED_10M</a> << <a class="el" href="Driver__ETH__PHY_8h.html#a13700fab82aa60a3357614faa0619e97">ARM_ETH_PHY_SPEED_Pos</a>)</td></tr>
<tr class="memdesc:gabc7acc4ebe828c3d0825400e14ad20f0"><td class="mdescLeft"> </td><td class="mdescRight">10 Mbps link speed <a href="group__eth__phy__mode__ctrls.html#gabc7acc4ebe828c3d0825400e14ad20f0">More...</a><br/></td></tr>
<tr class="separator:gabc7acc4ebe828c3d0825400e14ad20f0"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gad1e8b2c8c210fa36949db9a34a993657"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__mode__ctrls.html#gad1e8b2c8c210fa36949db9a34a993657">ARM_ETH_PHY_SPEED_100M</a>   (<a class="el" href="Driver__ETH_8h.html#a3bddfc4cf5645f8568d9cb6621fd606a">ARM_ETH_SPEED_100M</a> << <a class="el" href="Driver__ETH__PHY_8h.html#a13700fab82aa60a3357614faa0619e97">ARM_ETH_PHY_SPEED_Pos</a>)</td></tr>
<tr class="memdesc:gad1e8b2c8c210fa36949db9a34a993657"><td class="mdescLeft"> </td><td class="mdescRight">100 Mbps link speed <a href="group__eth__phy__mode__ctrls.html#gad1e8b2c8c210fa36949db9a34a993657">More...</a><br/></td></tr>
<tr class="separator:gad1e8b2c8c210fa36949db9a34a993657"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga046605398ceae99a176e6f82432ae710"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__mode__ctrls.html#ga046605398ceae99a176e6f82432ae710">ARM_ETH_PHY_SPEED_1G</a>   (<a class="el" href="Driver__ETH_8h.html#a218f470079b7c04de6776d467a53772a">ARM_ETH_SPEED_1G</a> << <a class="el" href="Driver__ETH__PHY_8h.html#a13700fab82aa60a3357614faa0619e97">ARM_ETH_PHY_SPEED_Pos</a>)</td></tr>
<tr class="memdesc:ga046605398ceae99a176e6f82432ae710"><td class="mdescLeft"> </td><td class="mdescRight">1 Gpbs link speed <a href="group__eth__phy__mode__ctrls.html#ga046605398ceae99a176e6f82432ae710">More...</a><br/></td></tr>
<tr class="separator:ga046605398ceae99a176e6f82432ae710"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aebafadc356d8e58407db156a5dac743f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__ETH__PHY_8h.html#aebafadc356d8e58407db156a5dac743f">ARM_ETH_PHY_DUPLEX_Pos</a>   2</td></tr>
<tr class="separator:aebafadc356d8e58407db156a5dac743f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a832fd4424dc9aaafac8034457396c259"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__ETH__PHY_8h.html#a832fd4424dc9aaafac8034457396c259">ARM_ETH_PHY_DUPLEX_Msk</a>   (1UL << ARM_ETH_PHY_DUPLEX_Pos)</td></tr>
<tr class="separator:a832fd4424dc9aaafac8034457396c259"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gace797b3cd143be22f47c3ef61b20e14d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__mode__ctrls.html#gace797b3cd143be22f47c3ef61b20e14d">ARM_ETH_PHY_DUPLEX_HALF</a>   (<a class="el" href="Driver__ETH_8h.html#acb15afc2bfe61c56049b7279d6eae8fe">ARM_ETH_DUPLEX_HALF</a> << <a class="el" href="Driver__ETH__PHY_8h.html#aebafadc356d8e58407db156a5dac743f">ARM_ETH_PHY_DUPLEX_Pos</a>)</td></tr>
<tr class="memdesc:gace797b3cd143be22f47c3ef61b20e14d"><td class="mdescLeft"> </td><td class="mdescRight">Half duplex link. <a href="group__eth__phy__mode__ctrls.html#gace797b3cd143be22f47c3ef61b20e14d">More...</a><br/></td></tr>
<tr class="separator:gace797b3cd143be22f47c3ef61b20e14d"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga5d06a94867c89cd311b6e279669321e3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__mode__ctrls.html#ga5d06a94867c89cd311b6e279669321e3">ARM_ETH_PHY_DUPLEX_FULL</a>   (<a class="el" href="Driver__ETH_8h.html#a7848c83cd1fd6b2645c17919c2990354">ARM_ETH_DUPLEX_FULL</a> << <a class="el" href="Driver__ETH__PHY_8h.html#aebafadc356d8e58407db156a5dac743f">ARM_ETH_PHY_DUPLEX_Pos</a>)</td></tr>
<tr class="memdesc:ga5d06a94867c89cd311b6e279669321e3"><td class="mdescLeft"> </td><td class="mdescRight">Full duplex link. <a href="group__eth__phy__mode__ctrls.html#ga5d06a94867c89cd311b6e279669321e3">More...</a><br/></td></tr>
<tr class="separator:ga5d06a94867c89cd311b6e279669321e3"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga6a8c54f8fed3e5f68bd04eb715d10ab9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__mode__ctrls.html#ga6a8c54f8fed3e5f68bd04eb715d10ab9">ARM_ETH_PHY_AUTO_NEGOTIATE</a>   (1UL << 3)</td></tr>
<tr class="memdesc:ga6a8c54f8fed3e5f68bd04eb715d10ab9"><td class="mdescLeft"> </td><td class="mdescRight">Auto Negotiation mode. <a href="group__eth__phy__mode__ctrls.html#ga6a8c54f8fed3e5f68bd04eb715d10ab9">More...</a><br/></td></tr>
<tr class="separator:ga6a8c54f8fed3e5f68bd04eb715d10ab9"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga5f7e46cda8ab3c774fe7ce0a8a1ba3ec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__mode__ctrls.html#ga5f7e46cda8ab3c774fe7ce0a8a1ba3ec">ARM_ETH_PHY_LOOPBACK</a>   (1UL << 4)</td></tr>
<tr class="memdesc:ga5f7e46cda8ab3c774fe7ce0a8a1ba3ec"><td class="mdescLeft"> </td><td class="mdescRight">Loop-back test mode. <a href="group__eth__phy__mode__ctrls.html#ga5f7e46cda8ab3c774fe7ce0a8a1ba3ec">More...</a><br/></td></tr>
<tr class="separator:ga5f7e46cda8ab3c774fe7ce0a8a1ba3ec"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga8d68719e07c7af449b57c5df802376c8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__mode__ctrls.html#ga8d68719e07c7af449b57c5df802376c8">ARM_ETH_PHY_ISOLATE</a>   (1UL << 5)</td></tr>
<tr class="memdesc:ga8d68719e07c7af449b57c5df802376c8"><td class="mdescLeft"> </td><td class="mdescRight">Isolate PHY from MII/RMII interface. <a href="group__eth__phy__mode__ctrls.html#ga8d68719e07c7af449b57c5df802376c8">More...</a><br/></td></tr>
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<tr class="memitem:ga987d5dd36f179192721c03df37d93e87"><td class="memItemLeft" align="right" valign="top">typedef int32_t(* </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__interface__gr.html#ga987d5dd36f179192721c03df37d93e87">ARM_ETH_PHY_Read_t</a> )(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)</td></tr>
<tr class="memdesc:ga987d5dd36f179192721c03df37d93e87"><td class="mdescLeft"> </td><td class="mdescRight">Pointer to <a class="el" href="group__eth__mac__interface__gr.html#gaded29ad58366e9222487db9944373c29">ARM_ETH_MAC_PHY_Read</a> : Read Ethernet PHY Register. <a href="group__eth__phy__interface__gr.html#ga987d5dd36f179192721c03df37d93e87">More...</a><br/></td></tr>
<tr class="separator:ga987d5dd36f179192721c03df37d93e87"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaf690fde16281b25f2ffa07f9c4e8e240"><td class="memItemLeft" align="right" valign="top">typedef int32_t(* </td><td class="memItemRight" valign="bottom"><a class="el" href="group__eth__phy__interface__gr.html#gaf690fde16281b25f2ffa07f9c4e8e240">ARM_ETH_PHY_Write_t</a> )(uint8_t phy_addr, uint8_t reg_addr, uint16_t data)</td></tr>
<tr class="memdesc:gaf690fde16281b25f2ffa07f9c4e8e240"><td class="mdescLeft"> </td><td class="mdescRight">Pointer to <a class="el" href="group__eth__mac__interface__gr.html#ga79dd38672749aeebd28f39d9b4f813ce">ARM_ETH_MAC_PHY_Write</a> : Write Ethernet PHY Register. <a href="group__eth__phy__interface__gr.html#gaf690fde16281b25f2ffa07f9c4e8e240">More...</a><br/></td></tr>
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<td class="memname">#define ARM_ETH_PHY_API_VERSION   <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,1) /* API version */</td>
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<td class="memname">#define _ARM_Driver_ETH_PHY_</td>
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<td>   Driver_ETH_PHY##n</td>
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<td>   <a class="el" href="Driver__ETH__PHY_8h.html#a261d0c3527c5880cbce44c92c5779a95">_ARM_Driver_ETH_PHY_</a>(n)</td>
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<td class="memname">#define ARM_ETH_PHY_SPEED_Pos   0</td>
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<td class="memname">#define ARM_ETH_PHY_SPEED_Msk   (3UL << ARM_ETH_PHY_SPEED_Pos)</td>
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<td class="memname">#define ARM_ETH_PHY_DUPLEX_Pos   2</td>
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<td class="memname">#define ARM_ETH_PHY_DUPLEX_Msk   (1UL << ARM_ETH_PHY_DUPLEX_Pos)</td>
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<li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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